Method of manufacturing semiconductor on insulator transistor with complementary transistor coupled to the channel

A method of forming a transistor structure comprising the steps of:

• providing a semiconductor layer having a first conductivity type;
• forming a first drain region in said semiconductor layer, said first drain region having a second conductivity type;
• forming a first source region in said semiconductive layer, said first source region having said second conductivity type, said first source region being separated from said first drain region by a first channel region;
• forming a second channel region having said second conductivity type in said semiconductive layer abutting said first channel region, said second channel disposed substantially perpendicularly to said first channel region;
• forming a second drain region in said semiconductive layer, said second drain region having said first conductivity type, said second drain region being separated from said first channel region by said second channel region;
• and
• forming a T-shaped gate on the surface of said semiconductive layer over said first and second channel regions such that a first potential applied to said gate causes said first channel region to be conductive and said second channel region to be non conductive and such that a second potential applied to said gate causes said second channel region to be substantially conductive and to couple said first channel region to a reference potential.

A method for forming a transistor structure comprising the steps of:

• providing a semiconductive layer having a first conductivity type;
• forming a first drain region in said semiconductive layer, said first drain region having a second conductivity type;
• forming a first source region in said semiconductive layer, said first source region having said second conductivity type, said first source region being separated from said first drain region by a first channel region;
• forming a second source region in said semiconductive layer, said second source region having said first conductivity type and said second source region abutting said first channel region;
• forming a second channel region having said second conductivity type in said semiconductive layer abutting said second source region, said second channel region disposed perpendicularly to said first channel region;
• forming a second drain formed in said semiconductive layer, said second drain region having said first conductivity type, said second drain region being separated from said first channel region by said second channel region;
• and
• forming a T-shaped gate on the surface of said semiconductive layer over said first and second channel regions such that a first potential applied to said gate causes said first channel region to be conductive and said second channel region to be non conductive and such that a second potential applied to said gate causes said second channel region to be substantially conductive and to couple said first channel region to a reference potential.

A method for forming a semiconductor device comprising:

• providing a substrate having a first conductivity type;
• forming a first source region in said substrate, said source region having a second conductivity type;
• forming a first drain region in said substrate, said first drain region having said second conductivity type and said first drain region being spaced from said first source region defining a first channel region therebetween;
• forming a second channel region of said second conductivity type in said substrate and abutting said first channel region said second channel disposed perpendicularly to said first channel region;
• forming a second drain region of said first conductivity type abutting said second channel region;
• and
• forming a T-shaped gate formed adjacent to said first and second channel regions, said gate controlling current between said first source and first drain regions and between said second drain region and said first channel region.