Back to results
US 5,399,515 AGranted
Method of fabricating a silicon carbide vertical MOSFET and device
AssigneeMotorola, Inc.
InventorsKenneth L. Davis, Charles E. Weitzel
Life of this patent
Estimating the term…
Abstract
A silicon carbide LOCOS vertical MOSFET formed on a silicon carbide substrate with portions of epitaxial layers defining the various transistor electrodes, rather than defining the electrodes with implants and diffusion. Because of the low diffusion rate in silicon carbide, the LOCOS operation can be performed after the doped epitaxial layers are formed.
Claims17
A method of fabricating a silicon carbide local oxidation vertical FET comprising the steps of:
- providing a silicon carbide substrate of a first conductivity type with a surface;
- forming a first epitaxial layer of the first conductivity type on the surface of the substrate, which said first epitaxial layer is lightly doped compared to the substrate and includes a surface;
- forming a second epitaxial layer of a second conductivity type on the surface of the first epitaxial layer;
- forming a third layer of the first conductivity type adjacent the surface of the second epitaxial layer, which said third layer is formed thinner than the second epitaxial layer;
- forming an opening in the third layer and a portion of the second epitaxial layer from the surface of the third layer;
- growing a local oxidation layer in the opening, the local oxidation layer being sufficiently thick to extend through the second epitaxial layer into communication with the first epitaxial layer and defining a gate region;
- forming a gate contact in overlying relationship to the gate region;
- defining a source region;
- and
- forming a source contact on the defined source region in contact with the third layer.
7 more elements
A method of fabricating a silicon carbide local oxidation vertical MOSFET comprising the steps of:
- providing a silicon carbide substrate of a first conductivity type with a surface;
- forming a first epitaxial layer of the first conductivity type on the surface of the substrate, which said first epitaxial layer is lightly doped compared to the substrate and includes a surface;
- forming a second epitaxial layer of a second conductivity type on the surface of the first epitaxial layer;
- forming a third layer of the first conductivity type adjacent the surface of the second epitaxial layer, which said third layer is formed thinner than the second epitaxial layer;
- providing a plasma etch mask on the surface of the third layer for protecting the third layer, the plasma etch mask having an open area defining a gate region;
- using the plasma etch mask to etch an opening through the third layer and the second epitaxial layer from the surface of the third layer so as to at least communicate with the first epitaxial layer;
- growing a local oxidation layer in the opening, the local oxidation layer being sufficiently thick to extend through the second epitaxial layer into communication with the first epitaxial layer and defining said gate region;
- removing at least a portion of the mask;
- forming a layer of gate oxide on the third layer and the defined gate region;
- forming a gate contact on the layer of gate oxide in overlying relationship to the gate region;
- defining a source region adjacent the opening by removing a portion of the layer of gate oxide;
- and
- forming a source contact of metal on the defined source region in contact with the third layer.
10 more elements
Dependencies are inferred from the claim text.