Method of fabricating a semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorAkihisa Taniguchi
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Abstract
In order to simplify the structure of a power amplifying transistor and improve its high-frequency characteristics, a base electrode (7b) and a collector electrode (7c) are formed on the surface of such a power amplifying transistor, while an emitter electrode (7e) is formed on its rear surface. Since it is possible to easily ground the emitter electrode (7e) and use the base and collector electrodes (7b, 7c) as an input and an output respectively, the structure is simplified and no wiring pattern is required, whereby high-frequency characteristics can be improved.
Claims3
A method of fabricating a semiconductor device having a base of a first conductivity type and an emitter and a collector of a second conductivity type, said method comprising the steps of:
- preparing a substantially isolating layer;
- selectively forming a plurality of emitter regions of said second conductivity type within an upper surface of said substantially isolating layer by introducing an impurity of said second conductivity type into said upper surface of said substantially isolating layer;
- forming a base region of said first conductivity type on said upper surface of said substantially isolating layer provided with said plurality of emitter regions;
- selectively forming a plurality of collector regions of said second conductivity type on said base region, opposite to said plurality of emitter regions, respectively;
- selectively forming a plurality of semiconductor regions of said second conductivity type within a rear surface of said substantially isolating layer by introducing an impurity of said second conductivity type into said rear surface of said isolating layer, said plurality of collector regions contacting said plurality of emitter regions, respectively;
- and
- forming a collector electrode, a base electrode, and an emitter electrode on said collector region, said base region, and said rear surface of said isolating layer provided with said semiconductor regions, respectively.
Dependencies are inferred from the claim text.