Synchronous message routing using a retransmitted clock signal in a multiprocessor computer system
AssigneeIntel Corporation
InventorSteven F. Nugent
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AssigneeIntel Corporation
InventorSteven F. Nugent
Estimating the term…
A parallel processing computer system having an improved architecture for communication of information between nodes. The computer system of the present invention comprises at least three nodes; each of the three nodes for processing information. Each of the nodes comprises a routing means for routing information between nodes. The routing means allow reservation of a route through the network of nodes. Messages may then be transmitted from an origin node to a destination node over the reserved route. Use of a route reservation system reduces requirements for buffering of information at intermediate nodes on a route, improves message passing latency and increases node-to-node bandwidth. The present invention teaches communication of messages between nodes in a synchronous manner.
A computer system having a plurality of nodes for processing information, a first node including a first processor coupled to a first router, a second node including a second processor coupled to a second router, a third node including a third processor coupled to a third router, said system comprising:
Dependencies are inferred from the claim text.