Bias generator for a low voltage differential read amplifier

A read amplifier configured for connection to a magnetic head, the read amplifier comprising:

• a differential transistor pair connected between first and second supply terminals and having first and second control terminals connected to a magnetic head for providing voltage changes at output terminals related to voltage changes across the magnetic head;
• a first transistor connected between first and second supply terminals, the first transistor configured for providing bias current to the differential transistor pair;
• bias current sensing means for sensing changes in bias current;
• and
• voltage compensation means for providing voltage compensation for maintaining the differential transistor pair operating point constant independent of bias current.

A read amplifier configured for interconnection with a magnetic head through head contacts, the read amplifier comprising:

• a differential transistor pair connected between first and second supply terminals and having first and second control terminals connected to the magnetic head for providing voltage changes at output terminals related to voltage changes between the magnetic head contacts;
• first and second impedances connected to the first and second control terminals of the differential transistor pair;
• bias current means connected to each of the first and second supply terminal for providing bias current for establishing a corresponding bias voltage in the differential transistor pair;
• and
• voltage compensation means for providing voltage compensation to the first and second control terminals to maintain a constant bias voltage independent of changes in bias current.

A bias generator for providing bias current to a differential read amplifier, the bias generator comprising:

• a first input impedance configured for connection to a differential read amplifier;
• first and second supply terminals;
• a first transistor connected between first and second supply terminals with the emitter of the first transistor connected to the first input impedance;
• mirror means connected between the first supply terminal and the collector of the first transistor for providing a mirror current to the base of the first transistor that is related to the first input impedance current by a selected ratio;
• a voltage compensation impedance connected between the first supply terminal and the base of the first transistor;
• first biasing means connected between the emitter of the first transistor and the second supply terminal for providing a bias current for the first transistor;
• and
• second biasing means connected between the voltage compensation impedance and the second supply terminal for providing bias current to the base of the first transistor so that voltage changes across the first input impedance are compensated for by voltage changes across the voltage compensation impedance so that a bias voltage associated with the bias current is constant independent of changes in the bias current.

A bias generator for providing bias current to a differential transistor pair of a read amplifier, the bias generator comprising:

• first and second supply terminals suited for connection to an electromotive force;
• a first transistor connected between the first and second supply terminals, the first transistor configured for connection to a differential transistor pair;
• mirror means connected between the first supply terminal and the first transistor for providing a current related to a first transistor current;
• a voltage compensation impedance connected between the first supply terminal and the first transistor;
• biasing means connected between the first transistor and the second supply terminal for providing bias current for the first transistor;
• and
• current source means connected between the base of the first transistor and the second supply terminal for providing current therebetween so that changes in current provided by the first transistor produce an inverse change in current for the voltage compensation impedance thereby maintaining a constant bias voltage independent of changes in bias current at the differential transistor pair.