High-performance superconducting digital-to-analog converter employing double-junction squid flip-flops
AssigneeTRW Inc.
InventorRobert D. Sandell
Life of this patent
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Abstract
A high-performance superconducting digital-to-analog (D/A) converter providing asynchronous high-speed, low-power D/A conversion. The high-performance superconducting D/A converter includes a double-junction superconducting quantum interference device (SQUID) voltage divider circuit, which generates a series of discrete binary voltages, and a double-junction SQUID voltage selector circuit, which selects the binary voltages in accordance with a digital input signal. The currents generated by the selected binary voltages are added together to produce an analog output current that represents the digital input.
Claims14
A high-performance superconducting digital-to-analog (D/A) converter providing asynchronous high-speed, low-power D/A conversion, comprising:
- a double-junction superconducting quantum interference device (SQUID) voltage divider circuit-for generating a series of discrete binary voltages;
- a double-junction SQUID voltage selector circuit for selecting the binary voltages in accordance with a digital input;
- and
- an output circuit in which currents generated by the selected binary voltages are added together to produce an analog output current that represents the digital input.
A high-performance superconducting digital-to-analog (D/A) converter providing asynchronous high-speed, low-power D/A conversion, comprising:
- a voltage divider circuit having N stages of double-junction divider superconducting quantum interference device (SQUID) flip-flops connected together in a cascade arrangement for dividing a reference voltage V.sub.o into N-1 discrete binary voltages (V.sub.o /2, V.sub.o /4, V.sub.o /8, . . . , V.sub.o /2.sup.N-1), N being the number of bits of a digital input, and wherein two of the N stages are a most significant bit (MSB) divider SQUID flip-flop and. a least significant bit (LSB) divider SQUID flip-flop corresponding to the most significant bit and the least significant bit, respectively, of the digital input;
- a voltage selector circuit having N states of nonlatching double-junction selector SQUID flip-flops for selecting the binary voltages in accordance with the digital input, each bit of the digital input being inductively coupled from a bit line to a respective one of the selector SQUID flip-flops;
- and
- an output circuit in which currents generated by the selected binary voltages are added together to produce an analog output current that represents the digital input.
A high-performance superconducting digital-to-analog (D/A) converter providing asynchronous high-speed, low-power D/A conversion, comprising:
- a voltage divider circuit for generating a series of discrete binary voltages from a reference voltage V.sub.o, the reference voltage being generated by way of the AC Josephson effect using a reference clock operating at a reference clock frequency, thus fixing the reference voltage to the reference clock frequency;
- a voltage selector circuit for selecting the binary voltages in accordance with a digital input signal;
- and
- an output circuit in which currents generated by the selected binary voltages are added together to produce an analog output current that represents the digital input.
Dependencies are inferred from the claim text.