Method of making a nonvolatile memory device having a sidewall insulating film doped with phosphorus

A process for production of an electrically programmable memory device, wherein a dielectric layer doped with phosphorus is formed covering a side surface of a first polycrystalline silicon film and a second polycrystalline silicon film to reduce long-term charge loss in said device, comprising the steps of:

• forming a first polycrystalline silicon film over a gate silicon dioxide layer,
• selectively removing said first polycrystalline silicon film,
• forming an interlayer dielectric layer over said first polycrystalline silicon film,
• forming a second polycrystalline silicon film over said interlayer dielectric layer,
• selectivity removing said second polycrystalline silicon film, said interlayer dielectric layer, and said first polycrystalline silicon film,
• depositing a doped insulating layer doped with phosphorus over said second polycrystalline silicon film, and
• anisotropically etching said doped insulating layer in order to form a side wall covering the side surface of said first polycrystalline silicon film and said second polycrystalline silicon film,
• wherein said side wall formation film is a multilayer film formed by providing an insulating layer not doped with phosphorus at the outer side of said phosphorus containing film.

A process for production of a nonvolatile memory device, comprising the steps of:

• forming a first insulating layer over a semiconductor substrate,
• forming a floating gate on said first insulating layer,
• forming a second insulating layer over said floating gate,
• forming a control gate over said second insulating layer,
• forming a side wall formation film doped with phosphorus over said semiconductor substrate by chemical vapor deposition, and
• anisotropically etching said side wall formation film to form a side wall doped with phosphorus at the side portion of the floating gate and control gate,
• wherein heat treatment is performed for oxidation after said side wall is formed.

A process for production of an electrically programmable memory device, wherein a dielectric layer doped with phosphorus is formed covering a side surface of a first polycrystalline silicon film and a second polycrystalline silicon film to reduce long-term charge loss in said device, comprising the steps of:

• forming a first polycrystalline silicon film over a gate silicon dioxide layer,
• selectively removing said first polycrystalline silicon film,
• forming an interlayer dielectric layer over said first polycrystalline silicon film,
• forming a second polycrystalline silicon film over said interlayer dielectric layer,
• selectivity removing said second polycrystalline silicon film, said interlayer dielectric layer, and said first polycrystalline silicon film,
• depositing a doped insulating layer doped with phosphorus over said second polycrystalline silicon film, and
• anisotropically etching said doped insulating layer in order to form a side wall covering the side surface of said first polycrystalline silicon film and said second polycrystalline silicon film,
• wherein heat treatment is performed for oxidation after said side wall is formed.

A process for production of an electrically programmable memory device, wherein a dielectric layer doped with phosphorus is formed covering a side surface of a first polycrystalline silicon film and a second polycrystalline silicon film to reduce long-term charge loss in said device, comprising the steps of:

• forming a first polycrystalline silicon film over a gate silicon dioxide layer,
• selectively removing said first polycrystalline silicon film,
• forming an interlayer dielectric layer over said first polycrystalline silicon film,
• forming a second polycrystalline silicon film over said interlayer dielectric layer,
• selectivity removing said second polycrystalline silicon film, said interlayer dielectric layer, and said first polycrystalline silicon film,
• doping a side surface of said first polycrystalline silicon film and said second polycrystalline silicon film with phosphorus by oblique ion implantation,
• depositing an insulating layer over said second polycrystalline silicon film, and
• anisotropically etching said insulating layer in order to form a side wall covering the side surface of said first polycrystalline silicon film and said second polycrystalline silicon film.

A process for production of an electrically programmable memory device, wherein a dielectric layer doped with phosphorus is formed covering a side surface of a first polycrystalline silicon film and a second polycrystalline silicon film to reduce long-term charge loss in said device, comprising the steps of:

• forming a first polycrystalline silicon film over a gate silicon dioxide layer,
• selectively removing said first polycrystalline silicon film,
• forming an interlayer dielectric layer over said first polycrystalline silicon film,
• forming a second polycrystalline silicon film over said interlayer dielectric layer,
• selectivity removing said second polycrystalline silicon film, said interlayer dielectric layer, and said first polycrystalline silicon film,
• depositing an insulating layer over said second polycrystalline silicon film,
• anisotropically etching said insulating layer in order to form a side wall covering the side surface of said first polycrystalline silicon film and said second polycrystalline silicon film,
• doping a side surface of said side wall with phosphorus by oblique ion implantation.

A process for production of an electrically programmable memory device, wherein a dielectric layer doped with phosphorus is formed covering-a side surface of a first polycrystalline silicon film and a second polycrystalline silicon film to reduce long-term charge loss in said device, comprising the steps of:

• forming a first polycrystalline silicon film over a gate silicon dioxide layer,
• selectively removing said first polycrystalline silicon film,
• forming an interlayer dielectric layer over said first polycrystalline silicon film,
• forming a second polycrystalline silicon film over said interlayer dielectric layer,
• selectivity removing said second polycrystalline silicon film, said interlayer dielectric layer, and said first polycrystalline silicon film,
• doping a side surface of said first polycrystalline silicon film and said second polycrystalline silicon film with phosphorus by predepositing a doped layer,
• depositing an insulating layer over said second polycrystalline silicon film, and
• anisotropically etching said insulating layer in order to form a side wall covering the side surface of said first polycrystalline silicon film and said second polycrystalline silicon film.