Event-driven signal processor interface having multiple paralleled microprocessor-controlled data processors for accurately receiving, timing and serially retransmitting asynchronous data with quickly variable data rates

For use in a data acquisition system which receives analog signals from a plurality of hydrophones and which receives real-time-information from an associated clock, and which processes the analog signals for introduction into a general purpose computer utilization environment, said acquisition system being of the type including a first-stage signal processing subsystem which provides a digital representation corresponding to the analog signals from the plurality of hydrophones, a second-stage signal processing subsystem, comprising:

• a plurality of signal processing units each having inputs coupled to receive a plurality of digital representations of analog signals from the hydrophones, each of said signal processing units including first buffer means for storing information including said digital representation of the acoustic information, an identification of a hydrophone that generated the acoustic information, and a time that the acoustic information is received from the hydrophone derived in part from the associated clock;
• a plurality of data processing units, individual ones of said data processing units having an input coupled to an output of a first buffer means of one of said signal processing units, each of said data processing units operating under the control of an operating program to determine if a pulse characteristic of the acoustic information indicates that the acoustic information is associated with a valid pulse and, responsive to a determination that the acoustic information is associated with a valid pulse, for formatting the stored information into a data packet having a predetermined format, said data processing units each further including a temporary storage means for the data packets awaiting transmission;
• and
• transmission means having an input coupled to an output of each of said data processing units, said transmission means including means for sequentially polling each of said data processing units to receive a data packet therefrom, said transmission means including second buffer means for buffering a data packet received from one of said data processing units, and further including means, coupled to an output of said second buffer means, for converting a parallel output of said second buffer means into a bit serial format, and for transmitting the data packet in the bit serial format.