Programmable error-checking matrix for digital communication system
AssigneeTandem Computers Incorporated
InventorsJon C. Freeman, Cheng-Gang Kong
Life of this patent
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Abstract
A programmable system for checking for protocol errors in a communication system includes a matrix for generating error checking signals selected by data fields utilized to implement a communication. If the configuration or protocol is changed the system facilitates reprogramming to compensate for the change.
Claims7
In a system having a plurality of modules coupled by a communication channel and having a communication protocol utilizing first and second data fields, said first data field encoding one of a plurality of M values, M being an integer and said second data field encoding one of a plurality of N values, N being an integer, with said first and second data fields transmitted in succession on the channel to define and control communication operations, a method for checking for protocol errors comprising the steps of:
- writing an error checking signal to a unique storage location in a group of N.times.M storage locations for each one of a set of the M.times.N possible pairs to said first and second data field values where said group of storage locations is divided into M first data field sets of storage locations, each first data field set including N storage locations with each storage location included in only one first data field set, with each written error checking signal having either a first check value indicating that the possible pair is allowed by the communication protocol or having a second check value indicating that the possible pair is forbidden by the communication protocol;
- receiving a given pair of said first and second data fields transmitted on said channel during a particular communication operation;
- decoding a received first data field to obtain a first data field value;
- utilizing only said first data field value to select a unique one of first data field sets;
- decoding a received second data field to obtain a second data field value;
- utilizing only said received second data field value to select a unique one of the N storage locations in the unique first data field set selected by said received first data field to provide a selected error checking signal selected only by said first and second received data fields;
- and
- aborting the particular communication operation if the selected error checking signal indicates that the received first and second data fields are not allowed by the communication protocol.
In a digital system including multiple modules coupled by a communication channel and that performs operations specified by first and second data fields transmitted on the channel to govern inter-module communication and operations, an error checking system, responsive to selected data fields, for indicating whether operations specified by the selected fields are allowed according to a particular hardware configuration and communication protocol, said error checking system comprising;
- a first non-programmable matrix decoder, having row and column inputs for receiving first and second fields respectively and an output for transmitting an unmasked error checking signal selected by said first and second fields received at said inputs, with said error checking signal having either a first check value if the first and second fields are not allowed by the particular hardware configuration and communication protocol or a second check value if the first and second data fields are allowed;
- means for providing selected first and second data fields to respective row and column inputs of said matrix decoder to select an unmasked error checking signal;
- a programmable row mask register for storing a set of row configuration bits, each bit programmably set to either a masking state or non-masking state;
- and
- mask logic means, coupled to the output of said matrix decoder and coupled to said row mask register to receive the unmasked error checking value, and a row configuration bit selected by said first data field received at the row input of said matrix decoder, for providing an unmasked error signal having said second check value regardless of the value of said unmasked error signal output by said matrix decoder if the row configuration bit selected is set to the masking state and for providing an unmasked error signal having a value equal to the check value of said unmasked error signal output by said matrix if the row configuration bit selected is set to the unmasking state so that a pair of first and second fields previously forbidden can be allowed by reprogramming a row configuration bit.
Dependencies are inferred from the claim text.