Semiconductor memory device with redundant memory and floatable data line
AssigneeNEC Corporation
InventorTakahiko Urai
Life of this patent
Estimating the term…
Loading patent…
AssigneeNEC Corporation
InventorTakahiko Urai
Estimating the term…
A semiconductor memory device provided with a first circuit for storing and accessing data and a second circuit for storing and accessing internal information is disclosed, wherein the data and the internal information, when delivered from the first circuit and the second circuit, respectively, are transmitted through a common data line to an output terminal. The feature is that the second circuit is provided with a code generating circuit for generating test codes representing the internal information, and is arranged between the first circuit and the output terminal. The second circuit is operable in two modes, in the first mode transmitting data read from the first circuit directly to the output port through the common data line without any intervention of the code generating circuit, in the second mode delivering the test codes to the common data line.
A semiconductor memory device comprising:
Dependencies are inferred from the claim text.