Sense amplifier

A two-phase sense amplifier adapted to be used for sensing data of a memory array which includes plural memory cells, wherein drains of said memory cells in a column are electrically connected to a bit line and gates of said memory cells in a row are electrically connected to a word line, and wherein said memory array is electrically connected to an X-decoder and a Y-decoder which are utilized to obtain an address of a selected one of said memory cells in said memory array, comprising:

• a data sensing circuitry including:
• a presetting current detecting circuit for allowing said sense amplifier to be in a presetting phase when said X-decoder decodes an address of a selected word line of said selected memory cell and said Y-decoder decodes an address of a selected bit line of said selected memory cell, and then for setting a voltage level of said selected bit line to be around a switching point;
• and
• an evaluating current detecting circuit for allowing said sense amplifier to be in an evaluating phase after said voltage level of said selected bit line is around said switching point in order to sense a current in said selected cell for convening said current into a voltage output;
• a dummy cell circuitry electrically connected to said data sensing circuitry for providing a reference voltage to said data sensing circuitry;
• and
• a differential amplifier electrically connected to said data sensing circuitry and said dummy cell circuitry for accepting and comparing said voltage output of said data sensing circuitry and said reference voltage of said dummy cell circuitry to sense data of said selected memory cell.