Method of testing bit lines of a memory unit

A method of testing bit lines of a memory unit, the memory unit including a plurality of blocks, each block including storage elements arranged in rows and columns and individual storage elements being identified by a memory address having a column value, a block value and a row value, said method comprising the steps of:

• alternately writing a set of first binary values and a set of inverted first binary values, obtained by inverting said first binary values, respectively to blocks having even block values and to blocks having odd block values for all the storage elements within each of the plurality of the blocks;
• in a first setting step, setting the memory unit to a stressed condition;
• alternately reading pieces of binary data from first-row storage elements of the blocks having even block values and from final-row storage elements of the blocks having odd block values by repeatedly inverting the row value of the memory address and incrementing the block value of the memory address for each block;
• in a second setting step, setting the memory unit to a normal condition;
• and
• repeating said first setting step, said alternately reading step, and said second setting step, in succession, for all the columns of the plurality of the blocks.