Phase control circuit for controlling phase of video signal and sampling clock signal

A phase control circuit for controlling the phase of a video signal and sampling clock signal, comprising:

• sampling clock pulse output means for outputting a plurality of sampling clock pulses which are out of phase with each other;
• a plurality of sampling clock pulse switching means for selecting and outputting respective sampling clock pulses which are out of phase with each other from said plurality of sampling clock pulses every time a switching signal is supplied thereto;
• video sampling clock pulse output means for selecting one, at a time, of said plurality of sampling clock pulses and outputting the selected sampling clock pulse as a video sampling clock pulse to a display unit based on a video sampling clock pulse determining signal;
• a plurality of pixel data holding means connected respectively to said plurality of sampling clock pulse switching means, for holding pixel data in response to said sampling clock pulses outputted by said sampling clock pulse switching means, respectively;
• a plurality of pixel data counting means for counting the pixel data held by said pixel data holding means, respectively;
• and
• phase control means for confirming counts produced by said pixel data counting means in each of predetermined periods, outputting said video sampling clock pulse determining signal to said video sampling clock pulse output means if all the counts are equal to or greater than a predetermined value, and outputting new switching signals to said sampling clock pulse switching means, respectively, if any one of the counts is not equal to or greater than the predetermined value.