Polysilicon gate bus with interspersed buffers for driving a row of pixels in an active matrix liquid crystal display
AssigneeWAH-III Technology Corporation
InventorWilliam A. Hastings, III
Life of this patent
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Abstract
A polysilicon gate bus structure used for activating a row of pixels in a matrix of pixels of an active matrix liquid crystal display is described. The polysilicon gate bus is formed with a plurality of buffers interspersed along its length. A plurality of field effect transistors, each associated with one pixel in a row of pixels, have their gate electrodes connected to the polysilicon gate bus with the buffers interspersed among the gate electrode connections so as to speed up a row scanning signal propagation time to each of the gate electrode connections.
Claims4
A structure for driving four successive pixels in a row of pixels of an active matrix liquid crystal display, comprising:
- first, second, third, and fourth field effect transistors formed on a silicon substrate, each field effect transistor having a drain region, a source region, and a gate electrode, wherein said first field effect transistor controls the activation of a first pixel of said four successive pixels, said second field effect transistor controls the activation of a second pixel of said four successive pixels, said third field effect transistor controls the activation of a third pixel of said four successive pixels, and said fourth field effect transistor controls the activation of a fourth pixel of said four successive pixels;
- a buffer having a first portion, a second portion, an input, and an output;
- a first polysilicon gate bus segment connecting said gate electrodes of said first and second field effect transistors to said input of said buffer;
- and
- a second polysilicon gate bus segment connecting said output of said buffer to said gate electrodes of said third and fourth field effect transistors.
Dependencies are inferred from the claim text.