Digital to analog converter

A circuit for converting a digital input signal to an analog output signal at an analog output node indicative of the value of the digital signal, the digital signal including a plurality of bits grouped into a first group of M more significant bits and a second group of L less significant bits, the circuit comprising:

• a resistive ladder;
• a first switch bank coupled to the resistive ladder for converting the first bit group into a corresponding first quantized analog signal;
• a second switch bank coupled to the resistive ladder for converting the second bit group into a corresponding second quantized analog signal;
• a first differential transconductance stage having differential current outputs coupled to a differential current to voltage conversion stage which produces an analog output voltage at the analog output node, a first differential input coupled to the first switch bank and a second differential input coupled by a feedback path to the analog output node;
• a second differential transconductance stage having differential current outputs coupled to the differential current outputs of the first differential transconductance stage such that differential currents generated by the first and second transconductance stages are combined to produce an input signal for the differential current to voltage conversion stage, the second differential stage further having a first differential input coupled to the second switch bank, and a second differential input coupled to a reference potential.

A circuit for converting a digital signal to an analog output signal, the digital signal including a plurality of bits grouped into a first group of M more significant bits and a second group of L less significant bits, the circuit comprising:

• first signal generating means for converting the first bit group into a first quantized analog signal corresponding to the value of the first bit group, the means for converting providing a monotonic conversion between the digital signal corresponding to the first bit group and the first quantized analog signal;
• second signal generating means for generating a second quantized analog signal corresponding to the value of the first bit group incremented by one bit, the means for generating providing a monotonic conversion between the digital signal corresponding to the first bit group plus one bit and the second quantized analog signal;
• amplifier means including a first differential transconductance means coupled to the first signal generating means for buffering the first quantized analog signal to provide an analog output signal having a first component corresponding to the first quantized analog signal;
• means coupled to the first and second signal generating means for producing a plurality of quantized control signals, each signal corresponding to one of the first and second quantized analog signals depending on the value of the second bit group such that the number of control signals corresponding to the second quantized analog signal is a monotonic function of the value of the second bit group;
• and
• second differential transconductance means coupled to the control signal producing means and to the amplifier means for modulating the analog output signal by adding a second component indicative of a scaled sum of the number of control signals corresponding to the second quantized analog signal.

A circuit for converting a digital signal to an analog output signal at an analog output node, the digital signal including a plurality of bits grouped into a first group of M more significant bits and a second group of L less significant bits, the circuit comprising:

• a resistive ladder;
• a first set of switches coupled to the resistive ladder for providing a monotonic conversion between the digital signal corresponding to the first bit group and a first quantized analog signal;
• a second set of switches coupled to the resistive ladder for providing a monotonic conversion between the digital signal corresponding to the first bit group plus one and a second quantized analog signal;
• an amplifier including a first differential transconductance stage which generates a first differential current, the first differential transconductance stage having a first differential input coupled to the first set of switches for receiving the first quantized analog signal, a second differential input coupled to the analog output node by a feedback path, and corresponding first and second differential current outputs coupled to a differential current to voltage conversion stage which provides at the analog output node an analog output signal having a component indicative of the value of the first bit group;
• a third set of switches having a plurality of inputs each coupled to receive an input signal from one of the first quantized analog signal and the second quantized analog signal under control of the second bit group, and a plurality of outputs;
• and
• a second differential transconductance stage coupled to the amplifier which generates a second differential current that is combined with the first differential current in the amplifier to add an offset component to the analog output signal indicative of a scaled value of the second bit group, the second differential transconductance stage having a first plurality of inputs coupled to the plurality of outputs of the third set of switches and a second plurality of inputs coupled to the first set of switches, whereby the magnitude of the offset component is selected by the setting of the third set of switches.

A circuit for converting a digital signal to an analog output signal at an analog output node, the digital signal including a plurality of bits grouped into a first group of M more significant bits and a second group of L less significant bits, the circuit comprising:

• first signal generating means for converting the first bit group into a first quantized analog signal corresponding to a value of the first bit group, the means for converting providing a monotonic conversion between the digital signal corresponding to the first bit group and the first quantized analog signal;
• second signal generating means for generating a second quantized analog signal corresponding to the value of the first bit group incremented by one bit, the means for generating providing a monotonic conversion between the digital signal corresponding to the first bit group plus one bit and the second quantized analog signal;
• means coupled to the first and second signal generating means for producing a plurality of quantized control signals, each signal corresponding to one of the first and second quantized analog signals depending on the value of the second bit group such that the number of control signals corresponding to the second quantized analog signal is a monotonic function of the value of the second bit group;
• and
• amplifier means coupled to the first signal generating means, the control signal producing means and the analog output node, for providing an analog output signal having a first component corresponding to the first quantized analog signal and a second component corresponding to a portion of the difference between the first and second quantized analog signals, the amplifier means including a differential transconductance stage having an offset voltage selected by the control signals produced by the control signal producing means to add the second component to the analog output signal, wherein the second component is indicative of a scaled sum of the number of control signals corresponding to the second quantized analog signal.

A circuit for converting a digital signal to an analog output signal, the digital signal including a plurality of bits grouped into a first group of M more significant bits and a second group of L less significant bits, the circuit comprising:

• a resistive ladder;
• a first set of switches coupled to the resistive ladder for providing a monotonic conversion between the digital signal corresponding to the first bit group and a first quantized analog signal;
• a second set of switches coupled to the resistive ladder for providing a monotonic conversion between the digital signal corresponding to the first bit group plus one and a second quantized analog signal;
• a third set of switches having a plurality of inputs coupled to receive an input signal from either the first quantized analog signal or the second quantized analog signal, and a plurality of outputs;
• and
• a differential amplifier having an output, a first plurality of differential inputs coupled to the plurality of outputs of the third set of switches and a second plurality of differential inputs coupled by a feedback path to the output, the differential amplifier generating an analog output signal at its output having a value between minimum and maximum thresholds established respectively by the first and second quantized analog signals, the value being selected by signals received by the differential amplifier from the third set of switches.

A digitally trimmed circuit for converting an M-bit digital input signal to an analog output signal, the circuit comprising:

• means for converting the M-bit digital input signal into a corresponding first quantized analog signal;
• means for generating a second quantized analog signal from an L-bit digital correction signal;
• means for buffering the first quantized analog signal to provide an analog output signal having a component corresponding to the first quantized analog signal;
• and means responsive to the second quantized analog signal for modulating the buffering means to add to the analog output signal a component indicative of a scaled value of the second quantized analog signal.

A digitally trimmed circuit for converting an M-bit digital input signal to an analog output signal, the circuit comprising:

• a resistive ladder;
• a first bank of switching devices coupled to the resistive ladder for converting the M-bit digital signal into a first quantized analog signal;
• a second bank of switching devices coupled to the resistive ladder for converting an L-bit digital correction signal into a second quantized analog signal;
• a first differential amplifier stage for providing the analog output signal such that the analog output signal has a component corresponding to the first quantized analog signal, said first differential amplifier stage including a differential current to voltage converter circuit having a voltage output coupled to an input of said first differential amplifier stage to provide a feedback signal to said first differential amplifier stage;
• a second differential amplifier stage for modulating the analog output signal to add to the analog output signal a component indicative of a scaled value of the second quantized analog signal such that the analog output signal accurately represents the M-bit digital input signal.