High gain differential amplifier capable of reducing offset voltage

A differential amplifier, comprising:

• a differential transistor pair including first and second bipolar transistors whose emitters are coupled in common and whose bases are connected to first and second input terminals, respectively;
• a first constant-current source, one end and another end of which are connected to the common emitters of the first and second bipolar transistors of the differential transistor pair and to a first power supply terminal, respectively;
• a pair of third and fourth bipolar transistors whose bases are coupled in common with a second power supply terminal and whose emitters are connected to collectors of the respective first and second bipolar transistors;
• a first field-effect transistor whose drain and gate are coupled and whose source is connected to a third power supply terminal;
• a second field-effect transistor whose gate, source and drain are connected to the gate and drain of the first field-effect transistor, to the third power supply terminal and to a collector of the third bipolar transistor, respectively;
• a third field-effect transistor whose gate, source and drain are connected to the collector of the third bipolar transistor and the drain of the second field-effect transistor, to the third power supply terminal and to an output terminal and a collector of the fourth bipolar transistor, respectively;
• a fifth bipolar transistor whose collector and base are connected to the gate and drain of the first field-effect transistor and to the second power supply terminal, respectively;
• a sixth bipolar transistor whose collector and base are connected to an emitter of the fifth bipolar transistor and to a fourth power supply terminal, respectively;
• and
• a second constant-current source, one end and another end of which are connected to an emitter of the sixth bipolar transistor and to the first power supply terminal, respectively.

A differential amplifier, comprising:

• a differential transistor pair including first and second bipolar transistors whose emitters are coupled in common and whose bases are connected to first and second input terminals, respectively;
• a first constant-current source, one end and another end of which are connected to the common emitters of the first and second bipolar transistors of the differential transistor pair and to a first power supply terminal, respectively;
• a pair of third and fourth bipolar transistors whose bases are coupled in common with a second power supply terminal and whose emitters are connected to collectors of the respective first and second bipolar transistors;
• a fifth bipolar transistor whose collector and base are coupled and whose emitter is connected to a third power supply terminal;
• a sixth bipolar transistor whose base, emitter and collector are connected to the collector and base of the fifth bipolar transistor, to the third power supply terminal and to a collector of the third bipolar transistor, respectively;
• a seventh bipolar transistor whose base, emitter and collector are connected to the collectors of the third and sixth bipolar transistors, to the third power supply terminal and to an output terminal and a collector of the fourth bipolar transistor, respectively;
• an eighth bipolar transistor whose collector and base are connected to the collector and base of the fifth bipolar transistor and to the second power supply terminal, respectively;
• a ninth bipolar transistor whose collector and base are connected to an emitter of the eighth bipolar transistor and to a fourth power supply terminal, respectively;r3 and
• a second constant-current source, one end and another end of which are connected to an emitter of the ninth bipolar transistor and to the first power supply terminal, respectively.