Method for characterizing the upset response of CMOS circuits using alpha-particle sensitive test circuits

A method of predicting the SEU susceptibility of a SRAM;

• the method comprising the steps of:
• a) providing an enhanced SEU sensitivity test SRAM having an electrically adjustable critical charge;
• b) determining the critical charge as a function of offset voltage to ascertain the upset capacitance C.sub.US of said test SRAM;
• c) exposing the test SRAM to a first known level of alpha particle energy to ascertain the overlayer thickness of said SRAM, said first known level being selected to stop the alpha particle energy in the collection layer of said SRAM;
• d) calculating the overlayer thickness .delta.X.sub.3 of said test SRAM based upon the charge deposited by said first known level;
• e) exposing the test SRAM to a second known level of alpha particle energy to ascertain the charge collection thickness of said SRAM, said second known level being selected so alpha particle energy stops beyond the collection layer;
• f) calculating the collection layer thickness .delta.X.sub.4 of said test SRAM based upon charge deposited by said second known level and the calculated thickness of said overlayer;
• and
• g) calculating the linear energy transfer (LET) for said test SRAM:
• ##EQU7## where V.sub.op.mu. =the peak value of offset voltage at maximum particle upset distribution;
• V.sub.os.mu. =the mean offset voltage in the spontaneous flip range;
• K=the hole-election pair charge-energy factor for silicon;
• .rho.=the density of silicon;
• C.sub.US =upset capacitance for SRAM.