Transistor with common base region
OwnerStephen P. Robb, William L. Fragale +1inventors
InventorsStephen P. Robb, William L. Fragale, Paul J. Groenig
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Abstract
A transistor (200) comprises a single, common base region (202). One or more source regions (112) are formed in the base region (202). One or more gate regions (120) overly the common base (202) and the source regions (112). In an alternate embodiment, the gate regions (320) have a raised central portion (321). In yet another embodiment, certain source regions (402) are cross connected (404). Additionally, a polysilicon pattern (602) may be used which provides a gate finger feed network (614, 616, 618), and gate fingers (604, 606, 608, 620) having length less than one half of the longest die dimension.
Claims24
A transistor comprising:
- a vertically stacked semiconductor structure comprising a first surface and a second surface parallel to the first surface, the transistor configured to conduct current from the first surface to the second surface;
- one or more source regions comprising a first material, the one or more source regions formed in the single common base region, wherein certain adjacent ones of the one or more source regions are cross-connected with the first material.
A transistor comprising:
- a common base region;
- one or more source regions formed in the common base region;
- and
- one or more gate regions overlying the common base region and the one or more source regions, wherein each of the gate regions comprises an elongated gate finger having a cross-section, the cross section having a central portion and edge portions, and wherein the central portion is thicker than the edge portions.
A vertical transistor comprising:
- a common base region;
- a plurality of elongated source regions comprising a first doped material, the plurality of source regions formed in the common striped base region, certain adjacent ones of the source regions being cross-connected with the first doped material;
- and
- one or more gate fingers overlying the common striped base region and the one or more source regions.
A transistor comprising:
- a semiconductor die having a length and a width;
- a patterned gate region comprising a plurality of gate fingers, the patterned gate region exposing a plurality of source contact regions;
- a gate feed network;
- each of the plurality of gate fingers having a gate finger length which is a distance from a furthest point on the gate finger to the gate feed network;
- a single metal level contacting the gate feed network and the plurality of source contact regions, the gate feed network being electrically isolated from the plurality of source contact regions, the plurality of source contact regions being contiguously electrically coupled;
- and
- wherein a maximum gate finger length is less than one half of the larger of the semiconductor die length and width.
A transistor comprising:
- a plurality of source regions interspersed in a plurality of parallel aligned gate fingers;
- a single metal level providing electrical contact to both the plurality of source contact regions and the plurality of gate fingers, the plurality of source regions being contiguously electrically coupled;
- and
- a single external electrical contact contacting the plurality of source regions via a portion of the single level of metal.
Dependencies are inferred from the claim text.