Method and apparatus for transmission line termination
AssigneeTexas Instruments Incorporated
InventorStephen R. Tomassetti
Life of this patent
Estimating the term…
Abstract
A method and apparatus for transmission line termination is provided in which a transmission line (12 and 14) is terminated by transmission gates (20 and 22) at a transmitter (24) and a receiver (26). The resistances of the transmission gates (20 and 22) are controlled by precision resistance control circuits (30 and 31), respectively. Precision resistance control circuit (30) uses a reference resistor (32) to control the resistance of the transmission gate (20).
Claims4
An integrated complementary metal oxide semiconductor (CMOS) circuit for transmission line termination, comprising:
- a reference cell having an N-channel CMOS transistor and a P-channel CMOS transistor with a source/drain connection;
- a direct current feed back loop having:
- a first amplifier connected to the source/drain connection of the N-channel CMOS transistor and the P-channel CMOS transistor of the reference cell for comparing current through a reference resistors resistance that is coupled to a transmission line with resistance of the N-channel CMOS transistor and the P-channel CMOS transistor of said reference cell;
- a second amplifier connected to the N-channel CMOS transistor and the P-channel CMOS transistor of the reference cell for comparing differences in current flow through the N-channel CMOS transistor and the P-channel CMOS transistor;
- a first integrator connected to the first amplifier and the second amplifier having its output connected to the gate of the N-channel CMOS transistor;
- and
- a second integrator connected to the first amplifier and the second amplifier having its output connected to the gate of the P-channel CMOS transistor.
A method of terminating a transmission line, comprising the steps of:
- flowing current through a reference resistor;
- flowing current through a reference cell having a P-channel CMOS transistor and an N-channel CMOS transistor having a source/drain connection;
- comparing current flowing through the reference cell and the reference resistor;
- generating control voltages in response to said step of comparing;
- and
- controlling resistance of a transmission gate having a P-channel CMOS transistor and an N-channel CMOS transistor with their sources and drains coupled together by connecting a control voltage to the gate of the P-channel CMOS transistor and another control voltage to the gate of the N-channel CMOS transistor.
Dependencies are inferred from the claim text.