Semiconductor polishing pad
AssigneeTexas Instruments Incorporated
InventorsFranklin L. Allen, William L. Smith, Thomas G. Debner, Dennis L. Olmstead
Life of this patent
Estimating the term…
Abstract
The invention is to a polishing pad 14 that has a polishing surface 19 in which portions 17 and 18 of the polishing surface 19 have been removed. The removed areas 17 and 18 are annular rings adjacent an outer 15 and inner 16 edges of the polishing pad 14. The non-polishing surfaces 18 and 19 taper 17a and 18a downward from the polishing surface 19.
Claims14
A polishing pad for polishing a semiconductor wafer having a central portion and a circumferential edge, said pad comprising:
- an annular ring member having an outer circumferential edge, an inner circumferential edge, and a central region of given thickness and having opposite sides located intermediate said outer and inner edges;
- at least one of said sides defining a flat planar polishing surface which is unbroken except for first and second grooves in said polishing surface defining first and second localized reductions in said thickness respectively located marginally of said outer and inner edges;
- said first and second reductions in thickness establishing non-polishing breaks in said polishing surface;
- and
- said breaks being dimensioned and configured so that the circumferential edge of a wafer moved cycloidally in fully supported position around said polishing surface will encounter said breaks more than the central portion of the wafer will encounter said-breaks.
In combination, a polishing machine and a polishing pad for polishing a semiconductor wafer having a central portion and a circumferential edge;
- said polishing pad comprising an annular ring having an outer circumferential edge, an inner circumferential edge, and a central region of given thickness defining a flat planar polishing surface intermediate said outer and inner edges;
- said polishing surface being unbroken except for first and second grooves in said polishing surface defining first and second localized reductions in said thickness respectively located marginally of said outer and inner edges;
- said first and second reductions establishing non-polishing breaks in said polishing surface;
- and
- said polishing machine comprising a wafer holder for mounting a wafer therein;
- and means for moving said wafer holder relative to said polishing pad to move the mounted wafer cycloidally in fully supported position around said polishing surface, so that the circumferential edge of the mounted wafer will encounter said breaks more than the central portion of the mounted wafer will encounter said breaks.
A method for polishing a semiconductor wafer having a central portion and a circumferential edge, said method comprising the steps of:
- providing a flat planar annular ring polishing pad having an outer circumferential edge, an inner circumferential edge and a central region having opposite sides located intermediate said outer and inner edges;
- one of said sides defining a polishing surface with first and second grooves respectively located marginally of said outer and inner edges;
- said grooves establishing non-polishing breaks in said polishing surface;
- mounting a wafer on a wafer holder;
- and
- moving said wafer holder relative to said polishing pad to move the mounted wafer cycloidally around said polishing surface, so that the circumferential edge of the mounted wafer encounters said grooves more than the central portion of the wafer encounters said grooves.
Dependencies are inferred from the claim text.