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US 5,394,107 AGranted
Absolute value circuit
AssigneeYozan Inc.
InventorsGuoliang Shou, Sunao Takatori, Makoto Yamamoto
Life of this patent
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Abstract
An absolute value circuit for analog type processing combines an analog inverter circuit and a maximum circuit. The inverter circuit uses an operational amplifier comprised of CMOS inverters which are connected in a cascade with a gain of 1. The maximum circuit includes a pair of nMOS transistors, the source follower outputs of which are connected to a common output.
Claims4
An absolute value circuit comprising:
- i) an inverter circuit to which an input voltage is applied;
- ii) a first nMOS transistor having a gate to which an output of said inverter circuit is applied, a drain connected to a power supply and a source forming a source follower output;
- iii) a second nMOS transistor having a gate to which said input voltage is applied a drain connected to a power supply and a source forming a source follower output;
- and
- iv) a common output to which said source follower outputs of said first and second nMOS transistors are connected.
2 more elements
Dependencies are inferred from the claim text.