Programmable logic array having programmable output driver drive capacity

A programmable logic array comprising:

• configurable logic cells disposed in lines and columns,
• each of said logic cells having signal inputs, control inputs, at least one signal output, and an output driver circuit connected upstream of the at least one signal output,
• said output driver circuit having a terminal for a first and a second supply potential and being connected to at least one of the control inputs, and
• said output driver circuit being controllable for setting its driver capacity to a level other than zero, corresponding to a signal value, by means of a digital signal applied to the at least one control input;
• and
• conductor tracks and switching elements for interconnecting said conductor tracks,
• said switching elements and said conductor tracks connecting the at least one signal output of each of said logic cells to at least one of the signal inputs of at least another one of said logic cells.