US 5,394,030 AGranted

Programmable logic device

AssigneeInfinite Technology Corporation

InventorsEarle W. Jennings, III, George H. Landers

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Abstract

A programmable logic device includes groups of AND logic function gates, the AND logic function gates in each group coupled to a logic OR function output gate associated with that AND logic function gate group. Each AND logic function gate group includes an output AND logic function gate having inputs that are programmable by respective programmable logic function generators (PLFG) of a set of PLFGs operatively associated with that output AND logic function gate. The PLFGs in any set of PLFGs receive the same sets of first logic input groups, and second programmable inputs. Operation of Boolean function generator output stages to carry out logic operations is controlled by first inputs from the logic OR function gates, and second programmable inputs received from logic cells according to logic inputs to said programmable cells. Inputs from the logic OR function gates are selected by programmable OR logic function generators. The PLFGs and BLFGs comprisise logic circuitry to generate output signals determined by any logic function of a plurality of the first logic inputs, and the second inputs. Using this PLD structure, outputs from the PLD can be used to control logic operations performed by the BLFGs using logic values and instructions originating externally of the PLD.

Claims26

Dependent claims

A programmable logic device including a plurality of groups of AND logic function gates, each AND logic function gate having a plurality of inputs, the AND logic function gates in each group having respective outputs coupled to inputs of a logic OR function output gate associated with that AND logic function gate group;

each of said plurality of said AND logic function gate groups including individual output AND logic function gates having inputs that are programmable by respective programmable logic function generators (PLFG) of a set of PLFGs operatively associated with that output AND logic function gate;
each PLFG having one or more sets of logic input groups and including means for generating from each logic input group, an output logic signal comprising any logic function of that logic input group according to programmable control inputs applied to said first PLFG,
each set of PLFGs coupled to supply PLFG outputs to the output AND logic function gate associated with that set of PLFGs;
wherein the PLFGs in any set of PLFGs receive the same sets of logic input groups;
and
an output stage coupled to generate an output under control of outputs from said logic OR function gates, said output stage including a Boolean function generator (BLFG) comprising:
means for generating an output signal representing any logic function of a plurality of first logic inputs according to second inputs to said BLFG;
a plurality of logic cells having outputs coupled to said BLFG to supply said second inputs according to logic inputs to said logic cells;
and
a plurality of programmable OR logic function generators each having:
an output coupled to supply one of said first logic inputs to said BLFG, a plurality of inputs coupled to respective outputs of a plurality of said logic OR function output gates, and control inputs to receive signals to programmably couple signals from said logic OR function output gates to said logic OR function generator output.

8 more elements

A programmable logic device including a plurality of groups of AND logic function gates, each AND logic function gate having a plurality of inputs, the AND logic function gates in each group having respective outputs coupled to inputs of a logic OR function gate associated with that AND logic function gate group;

each of a plurality of said groups of AND logic function gates including individual output AND logic function gates having inputs that are programmable by respective programmable logic function generators (PLFG) of a set of PLFGs operatively associated with that group of AND logic function gates;
each PLFG in a said set of PLFGs comprising logic gates coupled to receive the same set of logic input groups, and a group of programmable inputs for each respective logic input group, to generate, for each logic input group, a respective output determined according to said group of programmable inputs as any function of that particular logic input group, said outputs from said PLFGs in said set coupled as inputs to an AND logic function gate in said group of AND logic function gates operatively associated with that set of PLFGs;
and
circuitry to perform logic operations on outputs from said output logic OR function gates comprising:
a plurality of Boolean function generators (BLFG) each having a plurality of first logic inputs coupled by signal selection circuitry comprising signal selectors having outputs coupled to supply respective ones of said first logic inputs to said BLFGs, each signal selector including a plurality of inputs coupled to outputs of at least some of said output logic OR function gates;
each said BLFG comprising:
logic circuitry to generate an output signal representing any function of said plurality of first logic inputs to said BLFG according to second inputs to said BLFG;
and a plurality of logic cells having outputs coupled to said BLFG to supply said second inputs according to logic control inputs to said logic cells.

5 more elements

A programmable logic device including a plurality of groups of AND logic function gates each AND logic function gate having a plurality of inputs, the AND logic function gates in each group having respective outputs coupled to inputs of a logic OR function gate associated with that AND logic function gate group;

each of a plurality of said groups of AND logic function gates including individual output AND logic function gates having inputs that are programmable by respective programmable logic function generators (PLFG) of a set of PLFGs operatively associated with that group of AND logic function gates;
each PLFG in a said set of PLFGs comprising logic gates coupled to receive the same set of logic input groups, and a group of programmable inputs for each respective logic input group, to generate, for each logic input group, a respective output determined according to said group of programmable inputs as any function of that particular logic input group, said outputs from said PLFGs in said set coupled as inputs to an AND logic function gate in said group of AND logic function gates operatively associated with that set of PLFGs;
wherein at least some of said AND logic function gate groups comprise different numbers of logic input groups;
and
circuitry to perform logic operations controlled by outputs from said output logic OR function gates comprising:
a plurality of Boolean function generators (BLFG) each having a plurality of first logic inputs coupled by programmable logic OR function generators to outputs of at least some of said output logic OR function gates;
each said BLFG comprising:
logic circuitry to generate an output signal representing any function of said plurality of first logic inputs to said BLFG according to second inputs to said BLFG;
and a plurality of logic cells having outputs coupled to said BLFG to supply said second inputs according to logic control inputs to said logic cells;
each said programmable logic OR function generator comprising:
a plurality of inputs coupled to respective outputs of a plurality of said logic OR function output gates, and control inputs to receive signals to programmably couple signals from said logic OR function output gates to said logic OR function generator output;
wherein a plurality of said BLFGs have outputs coupled to inputs of respective clocked stores, said clocked stores coupled to receive clock signals to transfer clocked store outputs as logic inputs to said logic cells of at least one BLFG, and to externally accessible outputs;
and wherein the logic inputs to said logic cells also include selectable stored values.

10 more elements

Dependencies are inferred from the claim text.