Process for forming low dielectric constant insulation layer on integrated circuit structure
AssigneeLSI Logic Corporation
InventorsMichael D. Rostoker, Nicholas F. Pasch, Ashok K. Kapoor
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AssigneeLSI Logic Corporation
InventorsMichael D. Rostoker, Nicholas F. Pasch, Ashok K. Kapoor
Estimating the term…
A process is described for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer by first forming a composite layer, comprising one or more extractable materials and one or more matrix-forming insulation materials, over an integrated circuit structure on a semiconductor wafer, and then selectively removing the extractable material from the matrix-forming material without damaging the remaining matrix material, thereby leaving behind a porous matrix of the insulation material. In one embodiment, the composite layer is formed from a gel. The extractable material is removed by first dissolving it in a first liquid which is not a solvent for the matrix-forming material to form a solution. This solution is then removed from the matrix-forming material by rinsing the matrix in a second liquid miscible with the first solvent and which also is not a solvent from the matrix-forming material. The second liquid is then preferably removed from the matrix-forming material either by lyophilizing (freeze drying) or by raising the pressure and temperature above the critical point of the second liquid.
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
A process for forming a low dielectric constant insulation layer on an integrated circuit structure on a semiconductor wafer which comprises:
Dependencies are inferred from the claim text.