US 5,393,711 AGranted

Process for manufacturing semiconductor components

AssigneeRobert Bosch GmbH

InventorsVesna Biallas, Herbert Goebel, Richard Spitz

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Abstract

A process for manufacturing semiconductor components, especially diodes. The process entails first bonding two semiconductor wafers of different conducting types (p and n), according to a silicon-fusion bonding process (SFB), thereby forming a bonded wafer assembly with a p-n junction. The bonded wafers are then partitioned into a plurality of semiconductor elements by the cutting of grooves into the bonded wafers to a depth which extends at least to the p-n junction. Each of the plurality of semiconductor elements thus formed has an individual p-n junction with sides exposed by the grooves. The sides of the semiconductor elements are then subjected to etching and passivation. The upper and lower surfaces of the bonded wafer assembly are then metal-coated. Finally, the semiconductor elements are separated from each other by a sawing operation.

Claims20

Dependent claims

A process for the production of semiconductor elements, comprising the steps of:

(a) bonding together, using a silicon-fusion bonding process, an upper and a lower semiconductor body of different conducting types and suitable doping, so that a bonded semiconductor assembly is formed with a p-n junction between the bonded semiconductor bodies;
(b) forming grooves, in an upper surface of the bonded semiconductor assembly, with a depth extending at least to the p-n junction, thereby partitioning the bonded semiconductor assembly into a plurality of semiconductor elements, each with an individual p-n junction having sides exposed by the grooves;
(c) over-etching the sides of the individual p-n junctions;
(d) applying passivation to the upper surface of the bonded semiconductor assembly and to the grooves, thereby forming a passivated upper surface and passivated grooves;
(e) mechanically removing the passivated upper surface until the upper surface is again exposed;
(f) metal-coating the upper surface and a lower surface of the bonded semiconductor assembly;
and
(g) separating the semiconductor elements from the bonded semiconductor assembly.

5 more elements

Dependencies are inferred from the claim text.