Methods of patterning and manufacturing semiconductor devices

A patterning method for a semiconductor device comprising the steps of:

• (a) forming a first layer;
• (b) forming a second layer on the first layer;
• (c) forming a hemisphere polysilicon particle layer having hills and valleys on the second layer;
• (d) etching portions of the second layer beneath the valleys of the hemisphere polysilicon particle layer to expose portions of the first layer, wherein the hills of the hemisphere polysilicon particle layer are used as a mask;
• and
• (e) etching the exposed portions of the first layer.

A method of manufacturing a capacitor on a semiconductor substrate, wherein the capacitor has a plurality of protrusions, comprising the steps of:

• (a) forming a capacitor node contact on the semiconductor substrate, forming a first polysilicon layer over the capacitor node contact;
• (b) forming an insulation layer on the first polysilicon layer and forming a hemisphere particle layer having hills and valleys on the insulation layer;
• (c) etching portions of the insulation layer beneath the valleys of the hemisphere particle layer to expose portions of the first polysilicon layer, wherein the hills of the hemisphere particle layer are used as a mask, wherein the insulation layer has a plurality of protrusions formed therein having upper portions;
• (d) filling the etched portions of the second insulation layer with a second polysilicon layer, wherein the upper portions of the protrusions of the second insulation are exposed;
• and
• (e) removing the insulation layer, wherein a plurality of protrusions of the second polysilicon layer are formed, and forming a dielectric layer and plate polysilicon layer on the plurality of protrusions of the second polysilicon layer.

A method of manufacturing a capacitor on a semiconductor substrate, wherein the capacitor has a plurality of protrusions, comprising the steps of:

• (a) forming a capacitor node contact on the semiconductor substrate, forming a node polysilicon layer over the capacitor node contact;
• (b) forming an insulation layer on the storage node polysilicon layer, and forming a hemisphere particle layer having hills and valleys on the insulation layer;
• (c) etching the portions of the insulation layer beneath the valleys of the hemisphere particle layer to expose portions of the node polysilicon layer, wherein the hills of the hemisphere particle layer are used as a mask, wherein the insulation layer has a plurality of protrusions formed therein having upper portions and side surface portions;
• (d) forming a storage polysilicon layer on the overall surface, and anisotropically etching the storage polysilicon layer to expose the upper portions of the protrusions of the insulation layer, wherein portions of the storage polysilicon layer remain as side walls on the side surfaces of the protrusions of the insulation layer;
• and
• (e) removing the insulation layer, wherein protrusions of the storage polysilicon layer are formed on the node polysilicon layer, forming a dielectric layer and plate polysilicon layer on the protrusions of the storage polysilicon layer and the node polysilicon layer.

A method of manufacturing a capacitor on a semiconductor substrate, wherein the capacitor has a plurality of protrusions, comprising the steps of:

• (a) forming a capacitor node contact on the semiconductor substrate, and forming a storage node polysilicon layer over the capacitor node contact;
• (b) forming an insulation layer on the storage node polysilicon layer, and forming a hemisphere particle layer having hills and valleys on the insulation layer;
• (c) etching the portions of the insulation layer beneath the valleys of the hemisphere particle layer to expose the storage node polysilicon layer, wherein the hills of the hemisphere particle layer are used as a mask, wherein a plurality of protrusions of the insulation layer is formed;
• (d) etching the exposed portions of the storage node polysilicon layer to a predetermined depth, wherein the protrusions of the insulation layer are used as a mask;
• and
• (e) removing the insulation layer and forming a dielectric layer and plate polysilicon layer on the storage node polysilicon layer.