Filter circuit with switchable finite impulse response and infinite impulse response filter characteristics
AssigneeYozan Inc.
InventorsSunao Takatori, Makoto Yamamoto
Life of this patent
Estimating the term…
Abstract
A filter which can operate as a digital filter of the finite impulse response type or the infinite impulse response type using one circuit. The signal to be filtered is multiplied and added using a first calculation circuit and a second calculation circuit. The outputs of the calculation circuits are added using addition circuits. Either the output of the addition circuit or the input of the first calculation circuit is applied by a switching element to the first calculation circuit.
Claims16
A filter circuit comprising:
- i) first circuit means having a plurality of first holding circuits and a plurality of first multiplication circuits, said first holding circuits for holding first input data in time series and each of said first multiplication circuits for multiplying an output of one of said first holding circuits by a first mutiplier;
- ii) second circuit means having a plurality of second holding circuits and a plurality of second multiplication circuits, said second holding circuits for holding second input data and each of said second multiplication circuits for multiplying an output of one of said second holding circuits by a second multiplier;
- iii) addition means for calculating a total summation of multiplication results of said first and second circuit means;
- and
- iv) a switching circuit for inputting either an output of said addition circuit or delayed first input data as the second input data to said second circuit means.
A method for generating finite impulse response characteristics and infinite impulse response characteristics using one circuit, said method including the steps of:
- holding at least one first input data in time series;
- multiplying each said first input data by a first multiplier to generate multiplied first input data;
- holding at least one second input data;
- multiplying each said second input data by a second multiplier to generate multiplied second input data;
- calculating a total summation of said multiplied first input data and said multiplied second input data;
- and
- inputting said total summation or delayed first input data as second input data.
Dependencies are inferred from the claim text.