Preservation of a computer system processing state in a mass storage device
AssigneeIntel Corporation
InventorJohn I. Garney
Life of this patent
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AssigneeIntel Corporation
InventorJohn I. Garney
Estimating the term…
A computer system wherein the processing state of the system may be saved and restored on a mass storage device upon the occurrence of a triggering event. The computer system of the present invention comprises a processor and various memory areas and system resources. Main memory includes several areas including a system management area comprising a segment of isolated random access memory within main memory. The system management area may only be accessed while the processor is in a system management interrupt state. The remaining portions of main memory are freely accessible (i.e. non-isolated) by any interrupt or noninterrupt processing logic. The basic approach of the present invention for saving the processing state of a computer system in nonvolatile storage is to: (1) sense a save system state triggering event; (2) write the contents of system registers and memory to a nonvolatile mass storage device; and (3) enter a suspend state and wait for a resume triggering event or power off the computer system completely. The basic approach of the present invention for restoring the processing state of the computer system from nonvolatile memory is to: (1) sense the resumption of processing of the application of power to the computer system; (2) read the contents of a previously save processing state from a nonvolatile mass storage device and restore the contents of memory and computer system registers; and (3) return control to the previously running application program.
In a computer system for operating in a protected and a nonprotected mode having a processor, a memory, and a nonvolatile mass storage device, said nonprotected mode including a system management interrupt mode, said memory being partitioned into an isolated memory and a non-isolated memory, said isolated memory being only accessible from said system management interrupt mode, said non-isolated memory being partitioned into a first portion of non-isolated memory that can only be accessed when said processor is operating in said protected mode and a second portion of non-isolated memory that can be accessed when said processor is operating in either said protected or nonprotected mode, a process for saving the processing state of said computer system, said process comprising the steps of:
In a computer system for operating in a protected and a nonprotected mode having a processor, a memory, and a nonvolatile mass storage device, said nonprotected mode including a system management interrupt mode, said memory being partitioned into an isolated memory and a non-isolated memory, said isolated memory being only accessible from said system management interrupt mode said non-isolated memory being partitioned into a first portion of non-isolated memory that can only be accessed when said processor is operating in said protected mode and a second portion of non-isolated memory that can be accessed when said processor is operating in either said protected or nonprotected mode, a process for restoring the processing state of said computer system, said process comprising the steps of:
In a computer system for operating in a protected and nonprotected mode having a processor, a memory, and a nonvolatile mass storage device, said nonprotected mode including a system management interrupt mode, said memory being partitioned into an isolated memory and a non-isolated memory, said isolated memory being only accessible from said system management interrupt mode, said non-isolated memory being accessible when said processor is operating in either said protected or nonprotected mode, a process for saving the processing state of said computer system, said process comprising the steps of:
In a computer system for operating in a protected and a nonprotected mode having a processor, a memory, and a nonvolatile mass storage device, said nonprotected mode including a system management interrupt mode, said memory being partitioned into an isolated memory and a non-isolated memory, said isolated memory being only accessible from said system management interrupt mode, a process for restoring the processing state of said computer system, said process comprising the steps of:
Dependencies are inferred from the claim text.