Calibration systems and methods for setting PLL gain characteristics and center frequency

An integrated phase-locked loop (PLL) and calibration system comprising:

• a phase detector means for comparing the phases of an output signal of the PLL and a reference input signal to produce an error signal representative of any phase difference;
• an amplifier/filter coupled to receive the error signal and produce therefrom a voltage control signal V.sub.c ;
• a voltage to current converter coupled to the amplifier/filter to receive at an input the voltage control signal V.sub.c and generate therefrom a converter current I.sub.c ;
• a current controlled oscillator having a current input I.sub.0 and a frequency output F.sub.0, the frequency output F.sub.0 of the current controlled oscillator comprising the output signal of the PLL and being proportional to the current input I.sub.0 ;
• means for providing a bias current I.sub.b to the current controlled oscillator, wherein the current input I.sub.0 comprises a summation of the converter current I.sub.c and the bias current I.sub.b ;
• and
• calibration means, coupled between the amplifier/filter and the current input to the current controlled oscillator, for calibrating the control voltage V.sub.c and frequency output F.sub.0, wherein when said frequency output F.sub.0 of the current controlled oscillator is set to a selected frequency, said calibration means is capable of driving the control voltage V.sub.c to a predefined, steady state voltage indicative of PLL circuit calibration for said selected frequency at the frequency output F.sub.0 of the current controlled oscillator.

A calibration system for a phase-locked loop (PLL) circuit having a phase comparator coupled through a charge pump, a filter, and a voltage to current converter, to a current controlled oscillator having a current input I.sub.0 and a frequency output F.sub.0, the current input I.sub.0 comprising a summation of a converter current I.sub.c from the voltage to current converter and a bias current I.sub.b, said calibration system comprising:

• first means for calibrating the PLL circuit with a selected first frequency F.sub.1 applied to the frequency output F.sub.0 of the current controlled oscillator such that a control voltage V.sub.c across the filter is driven to a predefined, steady state voltage V.sub.1 indicative of PLL circuit calibration for the selected first frequency F.sub.1 ;
• and
• second means for calibrating the PLL circuit to a second frequency F.sub.2 by disconnecting the charge pump and filter, setting the control voltage V.sub.c across the filter equal to a reference voltage V.sub.2 and driving the frequency output F.sub.0 of the current controlled oscillator to the second frequency F.sub.2, said second frequency F.sub.2 at the frequency output of the current controlled oscillator being indicative of PLL circuit calibration for the reference voltage V.sub.2 set across the filter, wherein V.sub.2 >V.sub.1, and F.sub.2 >F.sub.1, and by calibrating the phase-locked loop circuit at the first frequency F.sub.1 and the second frequency F.sub.2, gain characteristics of the PLL are calibrated.

An integrated phase-locked loop (PLL) and calibration system comprising:

• a phase detector means for comparing the phases of an output signal of the PLL and a reference input signal to produce an error signal representative of any phase difference;
• an amplifier/filter coupled to receive the error signal and produce therefrom a voltage control signal V.sub.c ;
• a voltage to current converter coupled to the amplifier/filter to receive at an input the voltage control signal V.sub.c and generate therefrom a converter current I.sub.c ;
• a current controlled oscillator having a current input I.sub.0 and a frequency output F.sub.0, the frequency output F.sub.0 of the current controlled oscillator comprising the output signal of the PLL and being proportional to the current input I.sub.0 ;
• means for providing a bias current I.sub.b to the current controlled oscillator, wherein the current input I.sub.0 comprises a summation of the converter current I.sub.c and the bias current I.sub.b ;
• first means for calibrating the PLL circuit with a selected first frequency F.sub.1 applied to the frequency output F.sub.0 of the current controlled oscillator such that the control voltage V.sub.c across the filter is driven to a predefined, steady state voltage V.sub.1 indicative of PLL circuit calibration for the selected first frequency F.sub.1 ;
• and
• second means for calibrating the PLL circuit to a second frequency F.sub.2 by disconnecting the charge pump and filter, setting the control voltage V.sub.c across the filter equal to a reference voltage V.sub.2 and driving the frequency output F.sub.0 of the current controlled oscillator to the second frequency F.sub.2, said second frequency F.sub.2 at the frequency output of the current controlled oscillator being indicative of PLL circuit calibration for the reference voltage V.sub.2 set across the filter, wherein V.sub.c >V.sub.1 and F.sub.2 >F.sub.1, and by calibrating the phase-locked loop circuit at the first frequency F.sub.R and the second frequency F.sub.2, gain characteristics of the PLL are calibrated.

A method for calibrating a phase-locked loop (PLL) circuit having a phase comparator coupled through a charge pump, a filter, and a voltage to current converter, to a current controlled oscillator having a current input I.sub.0 and a frequency output F.sub.0, the current input I.sub.0 to the current controlled oscillator consisting of a converter current I.sub.c from the voltage to current converter and a bias current I.sub.b, said calibrating method comprising the steps of:

• (a) calibrating the PLL circuit at a selected first frequency F.sub.1 applied to the frequency output F.sub.0 of the current controlled oscillator such that a control voltage V.sub.c across the filter is driven to a predefined, steady state voltage V.sub.1, indicative of PLL circuit calibration for the selected first frequency F.sub.1 ;
• and
• (b) calibrating the PLL circuit to a second frequency F.sub.2 by disconnecting the charge pump and filter, setting the control voltage V.sub.c across the filter equal to a reference voltage V.sub.2 and driving the frequency output F.sub.0 of the current controlled oscillator to the second frequency F.sub.2, said second frequency F.sub.2 at the frequency output of the current controlled oscillator being indicative of PLL circuit calibration for the reference voltage V.sub.2 set across the filter, wherein V.sub.2 >V.sub.1 and F.sub.2 >F.sub.1 and by calibrating the phase-locked loop circuit at the first frequency F.sub.1 and the second frequency F.sub.2, gain characteristics of the PLL are calibrated.