Bonding of integrated circuit chip to carrier using gold/tin eutectic alloy and refractory metal nitride barrier layer to block migration of tin through via holes

An integrated circuit assembly, comprising:

• a chip carrier;
• a gallium arsenide integrated circuit chip having a frontside surface with a microelectronic device fabricated thereon, a backside surface, and a via hole formed therethrough between the frontside and backside surfaces thereof;
• a bonding layer of an eutectic alloy material including tin which is fused between and bonds the backside surface of the chip to the carrier;
• and
• a barrier layer including a refractory metal nitride material formed between the backside surface of the chip and the bonding layer and inside the via hole of the chip such that the via hole is blocked by the barrier layer, said nitride material of the barrier layer blocking a migration of tin from said alloy material of the bonding layer through the via hole to the frontside surface of the chip that would otherwise occur in the absence of said barrier layer during heating of said assembly for eutectic bonding of said chip to said carrier by said bonding layer, said barrier layer providing an electrically and thermally conductive path through said via hole between said chip and said chip carrier.