Bus synchronization apparatus and method
AssigneeOPTi Inc.
InventorDipankar Bhattacharya
Life of this patent
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AssigneeOPTi Inc.
InventorDipankar Bhattacharya
Estimating the term…
Several techniques are used to optimize the transmission of signals or events from one bus to the other. In one aspect, the user of a chipset is permitted to choose whether the originating events (i.e. the events in response to which a destination event is to be generated on a destination bus) are to be generated synchronously or asynchronously with the clock signal on the destination bus. Whether synchronous or asynchronous generation is chosen, the chipset may perform a synchronization function in response to an originating bus predictor signal. The number of destination clock cycles to delay before generating the desired destination bus event is responsive to the relative frequencies of the clock signals on the two buses, thereby accommodating a wide variety of such relative frequencies. In another aspect, for events to be generated on a destination bus synchronously with a clock signal which is by specification stretchable, the destination bus event is generated promptly in response to the originating event and then the destination bus clock signal is stretched to make the destination bus event synchronous with the destination bus clock signal. The length of the stretch is responsive to the relative frequencies of the originating bus and destination bus clock frequencies. A synchronizer is used to generate the destination bus event synchronously with the destination bus clock signal. The user of the chipset can select which formula is to be applied.
Bus synchronization apparatus for use with a destination bus including a destination bus clock signal having a sequence of alternating polarity destination bus clock edges, for generating a desired bus event synchronously with said destination bus clock signal no earlier than a predetermined time relative to the occurrence of an originating event occurring asynchronously with said destination bus clock signal, comprising:
Bus synchronization apparatus for use with a destination bus including a destination bus clock signal having a frequency and having a sequence of alternating polarity destination bus clock edges, for generating a desired bus event synchronously with said destination bus clock signal in response to an originating event, comprising:
Bus synchronization apparatus for use with an originating bus including an originating bus clock signal having a frequency, and with a destination bus including a destination bus clock signal having a sequence of alternating polarity clock edges, for generating a desired event in response to an originating event which occurs synchronously with said originating bus clock signal, said destination bus clock signal having a lower frequency than said originating bus clock frequency, comprising:
A method for generating a desired bus event synchronously with a destination bus clock signal no earlier than a predetermined time relative to the occurrence of an originating event occurring asynchronously with said destination bus clock signal, comprising the steps of:
A method for generating a desired bus event synchronously with a destination bus clock signal in response to an originating event, comprising the steps of:
A method for generating a desired event in response to an originating event which occurs synchronously with an originating bus clock signal, said originating bus clock signal having a frequency lower than the frequency of a destination bus clock signal, comprising the steps of:
Dependencies are inferred from the claim text.