Differential amplifier having rail-to-rail input capability and square-root current control

An electronic circuit operable between first and second supply voltages which constitute a power supply range including a first end range extending to the first supply voltage, a second end range extending to the second supply voltage, and an intermediate range extending between the end ranges, the circuit comprising:

• first differential means for amplifying a differential input signal by largely dividing a first tail current into a pair of first main currents whose difference is representative of the input signal when its common-mode voltage V.sub.CM is in the intermediate and first ranges;
• second differential means for amplifying the input signal by largely dividing a second tail current into a pair of second main currents whose difference is representative of the input signal when V.sub.CM is in the intermediate and second ranges;
• and
• square root means comprising four like-polarity control FETs, each having respective gate electrodes and sources, coupled together in a loop by way of their gate electrodes and sources, whereby the sum of their gate-to-source voltages around the loop equal zero, for controlling the tail currents so that the sum of their square roots is largely constant during circuit operation as V.sub.CM traverses the entire intermediate range and the end ranges.