Tunable timing circuit and method for operating same and blasting detonator using same

An externally tunable clock circuit, comprising:

• an oscillator providing clock pulses of variable frequency based on an oscillator input voltage;
• a counter connected to receive the clock pulses to provide a clock pulse count indicating clock pulses generated by the oscillator during a predetermined period provided externally from the tunable clock circuit;
• a circuit to generate a difference signal indicating a difference between the clock pulse count and a predetermined value stored within the tunable clock circuit;
• and
• circuitry coupled to adjust the oscillator input voltage based on the difference signal;
• an input for receiving signals from a control unit:
• a storage capacitor connected to receive a charging current from the input;
• an output terminal for receiving current from the capacitor, said output terminal being connectable to a detonator element;
• a switch for selectively discharging the capacitor through said output terminal;
• and
• a firing circuit for connection to receive an external signal, said firing circuit being connected to the counter and being operable to close the switch to discharge the capacitor a predetermined time after an occurrence of external signal, the aforesaid combination forming a blasting detonator circuit.

A system of tunable clock circuits, comprising:

• (a) a plurality of integrated circuits each including:
• (i) a voltage controlled oscillator (VCO) for providing clock signals of variable frequency based on a VCO input voltage;
• (ii) a counter connected to receive timing and control signals as well as signals from the VCO and provide a digital clock count indicative of clock signals generated by the VCO during a predetermined period;
• and
• (III) a circuit connected to adjust the input voltage to the VCO based on differences between the digital clock count and a predetermined value;
• and
• (b) a controller coupled to provide timing and control signals to each integrated circuit to define predetermined periods;
• a storage capacitor connected to receive a charging current from the controller;
• an output terminal for receiving current from the capacitor, said output terminal being connectable to an ignition element;
• a switch for selectively discharging the capacitor through said terminal;
• and
• a firing circuit connected to receive a fire signal from the controller and connected to the counter, said firing circuit operable to close the switch and discharge the capacitor a predetermined time after receiving the fire signal, the aforesaid combination forming a blasting detonator circuit, said system providing for individual control of timed detonations at a plurality of locations, activation of each detonation being delayable by a predetermined time periods that may be different.

A system for individually controlling various timed operations among a plurality of locations, activation of an operation at each location being delayable by a programmable time, comprising:

• (a) a plurality of addressable circuits each having a programmable delay time, each circuit comprising:
• (i) a voltage controlled oscillator (VCO) for providing clock signals of variable frequency based on an input voltage;
• (ii) a counter connected to receive timing and control signals and clock signals from the VCO to provide a digital VCO clock count indicating clock signals generated by the VCO during an externally provided predetermined period;
• (iii) a circuit connected to adjust the input voltage to the VCO based on differences between the VCO clock count and a predetermined value;
• and
• (iv) an activation circuit connected to initiate an operation after an externally defined delay time measured by VCO clock signals;
• and
• (b) a controller coupled to individually address each addressable circuit and provide each addressable circuit with timing signals defining the predetermined period and a delay time, said controller further providing a control signal to start each addressable circuit to measure the delay times to initiate operations of the activation circuits.