Method and system for routing cells in an ATM switch

A method for routing cells from input ports to output ports of an ATM switch, the method comprising the steps of:

• providing a plurality of switching planes having inputs and outputs;
• storing the cells appearing on the input ports of the ATM switch in a plurality of input queues;
• assigning the input queues to the inputs of the switching planes in a controlled fashion to more uniformly distribute the flow of cells across the switching planes, the switching planes routing cells along paths therethrough to the outputs of the switching planes in parallel;
• combining and storing the cells appearing on the outputs of the switching planes;
• and
• retrieving and applying the combined stored cells to the output ports of the ATM switch;
• and wherein the step of assigning is controlled so that the paths of the stored cells from the input queues to the switching planes are scrambled.

A system for routing cells from input ports to output ports of an ATM switch, the system comprising:

• a plurality of switching planes having inputs and outputs;
• means for storing the cells appearing on the input ports of the ATM switch, the means for storing including a plurality of input queues;
• means for assigning the input queues to the inputs of the switching planes in a controlled fashion to more uniformly distribute the flow of cells across the switching planes, the switching planes routing cells along paths therethrough to the outputs of the switching planes in parallel;
• means for combining and storing the cells appearing on the outputs of the switching planes;
• and
• means for retrieving and applying the combined stored cells to the output ports of the ATM switch and wherein the means for assigning controls the assignment of the paths of the stored cells from the input queues to the switching planes in a scrambled fashion.

A switch for routing information cells having destination addresses from input ports of the switch to output ports of the switch, the switch comprising:

• a plurality of input buffers having outputs for storing the information cells, the input buffers being arranged in one or more groups;
• a central switch fabric including a plurality of switching planes having inputs and outputs;
• a path switch associated with each group of input buffers for selectively connecting the signals appearing on the outputs of the buffers of that group to the inputs of the plurality of switching planes;
• a plurality of contention resolution devices (CRD), one CRD being associated with each of said switching planes for resolving contention among information cells for access to the outputs of said switching plane, each CRD providing indication signals for winning and losing information cells;
• a feedback path means for communicating win/lose signals from the CRDs back to the plurality of input buffers from which the winning and losing information cells originated;
• and
• an output buffered switch including a plurality of output buffers arranged in one or more groups for receiving the information cells from the outputs of the plurality of switching planes for routing the information cells to the proper output port of the switch in accordance with destination addresses of the information cells;
• and wherein the switch further comprises path controller logic means for asserting routing priority for information cells and wherein the path switch is a crosspoint switch controlled by the path controller logic means.

A switch for routing information cells having destination addresses from input ports of the switch to output ports of the switch, the switch comprising:

• a plurality of input buffers having outputs for storing the information cells, the input buffers being arranged in one or more groups;
• a central switch fabric including a plurality of switching planes having inputs and outputs;
• a path switch associated with each group of input buffers for selectively connecting the signals appearing on the outputs of the buffers of that group to the inputs of the plurality of switching planes;
• a plurality of contention resolution devices (CRD), one CRD being associated with each of said switching planes for resolving contention among information cells for access to the outputs of said switching plane, each CRD providing indication signals for winning and losing information cells;
• a feedback path means for communicating win/lose signals from the CRDs back to the plurality of input buffers from which the winning and losing information cells originated;
• and
• an output buffered switch including a plurality of output buffers arranged in one or more groups for receiving the information cells from the outputs of the plurality of switching planes for routing the information cells to the proper output port of the switch in accordance with destination addresses of the information cells;
• and wherein the switch further comprises means for preventing output buffer overflow, said means for preventing collecting addresses of the most occupied output buffers, feeding the addresses back to the input buffers, performing address comparisons, and, inhibiting operation of said input buffers having head-of-line information cells destined for said most occupied output buffers, said means for preventing being inoperative with respect to any input buffers in danger of overflow.

A method for routing cells on a cell-by-cell basis from inputs and outputs of an ATM switch comprising a plurality of switching planes having inputs and outputs, said switching planes comprising crosspoint switch planes each having a contention resolution device for resolving contentions between cells, the method comprising the steps of:

• storing the cells appearing on the input ports of the ATM switch in a plurality of input queues;
• assigning the input queues to the inputs of the switching planes in a controlled fashion to more uniformly distribute the flow of cells across the switching planes, the switching planes routing cells along paths therethrough to the outputs of the switching planes in parallel on a cell-by-cell basis;
• combining and storing the cells appearing on the outputs of the switching planes;
• retrieving and applying the combined stored cells to the output ports of the ATM switch;
• and
• communicating contention resolution information concerning resolved contentions so as to control the step of assigning in a manner responsive to the contention resolution information.

A system for routing cells from input ports to output ports of an ATM switch on a cell-by-cell basis, the system comprising:

• a plurality of crosspoint switch switching planes having inputs and outputs, each of the switching planes having a contention resolution device for resolving contentions between cells;
• means for storing the cells appearing on the input ports of the ATM switch in a plurality of input queues;
• means for assigning the input queues to the inputs of the switching planes in a controlled fashion to more uniformly distribute the flow of cells across the switching planes, the switching planes routing cells along paths therethrough to the outputs of the switching planes in parallel on the cell-by-cell basis;
• means for combining and storing the cells appearing in the outputs of the switching planes;
• means for retrieving and applying the combined stored cells to the output ports of the ATM switch;
• and
• means for communicating contention resolution information concerning resolved contentions so as to control the means for assigning in a manner responsive to the contention resolution information.

A switch for routing information cells having destination addresses from input ports of the switch to output ports of the switch on a cell-by-cell basis, the switch comprising:

• a plurality of input buffers having outputs for storing the information cells, the input buffers being arranged in one or more groups;
• a central switch fabric including a plurality of switching planes having inputs and outputs;
• a path switch associated with each group of input buffers for selectively connecting the signal appearing on the outputs of the buffers of that group to the inputs of the plurality of switching planes;
• interconnecting means for interconnecting the path switches and the switching planes so that different signal paths selectable by the path switch are characterized by different sets of signals in contention for outputs of the switching planes;
• a plurality of contention resolution devices, one device being associated with each of said switching planes for resolving contention among information cells for access to the outputs of said switching plane on the cell-by-cell basis, each contention resolution device providing indication signals for winning and losing information cells;
• a feedback path means for communicating win/lose signals from the contention resolution devices back to the plurality of input buffers from which the winning and losing information cells originated;
• and
• an output buffered switch including a plurality of output buffers arranged in one or more groups for receiving the information cells from the outputs of the plurality of switching planes for routing the information cells to the proper output port of the switch in accordance with destination addresses of the information cells;
• and
• wherein each signal path selectable by a path switch traverses the central switching fabric through a different switching plane.