Back to results
US 5,365,405 AGranted
Multi-chip module
AssigneeSiemens Aktiengesellschaft
InventorsWolfgang Hoenlein, Volker Lehmann
Life of this patent
Estimating the term…
Abstract
A multi-chip module has a carrier (21) of monocrystalline silicon whose surface is at least partially enlarged by anodic electro-chemical etching in a fluoride-containing acidic electrolyte. At least one capacitor (23) that has a dielectric layer and a conductive layer is arranged on the enlarged surface of the carrier (21), whereby the carrier (21) and the conductive layer act as capacitor electrodes.
Claims16
A multi-chip module, comprising:
- a carrier of monocrystalline silicon, said carrier having a surface that is at least partially enlarged by electro-chemical etching in a fluoride-containing acidic electrolyte to produce a plurality of hole openings that thereby form an enlarged surface portion of said surface, said carrier being connected as an anode;
- and
- at least one capacitor arranged on said enlarged surface portion, said at least one capacitor having a dielectric layer that uniformly covers a surface of the hole openings and a portion of said surface of said carrier between said hole openings, said at least one capacitor also having a conductive layer that is arranged on said dielectric layer, whereby said carrier and said conductive layer act as capacitor electrodes of said at least one capacitor.
A multi-chip module, comprising:
- a substrate carrier having opposed first and second surfaces;
- a predetermined portion of said first surface being enlarged, said predetermined portion of said first surface of said substrate carrier having a plurality of hole openings that thereby enlarge said predetermined portion;
- at least one capacitor arranged on said predetermined portion of said first surface, said at least one capacitor having a dielectric layer that uniformly covers a surface of the hole openings and a part of said first surface located between said hole openings, said at least one capacitor also having a conductive layer on said dielectric layer;
- wherein an upper surface of said at least one capacitor is substantially at the same level as said first surface of said carrier.
1 more element
A multi-chip module, comprising:
- a substrate carrier having opposed first and second surfaces;
- a predetermined portion of said first surface being enlarged, said predetermined portion of said first surface of said substrate carrier having a plurality of hole openings that thereby enlarge said predetermined portion;
- at least one capacitor arranged on said predetermined portion of said first surface, said at least one capacitor having a dielectric layer that uniformly covers a surface of the hole openings and a part of said first surface located between said hole openings, said at least one capacitor also having a conductive layer on said dielectric layer, said at least one capacitor having an upper surface that is substantially at the same level as said first surface of said carrier;
- at least one electronic component arranged on said first side of said substrate carrier at least partially in an area outside of said predetermined portion;
- and
- at least one metallization electrically connecting said at least one capacitor to said at least one electronic component.
3 more elements
Dependencies are inferred from the claim text.