Method of making integrated circuits

A method of fabricating an integrated circuit, comprising:

• providing a semiconductor substrate having a surface and having formed thereon a first chemical mechanical polish stop layer and an overlying first dielectric layer, the substrate having defined therein a steep sided trench;
• providing a conformal layer of a trench filling material overall extending over the surface of the first dielectric adjacent the trench and filling the trench, the thickness of the conformal trench filling layer being sufficient to fill a centre of the trench coplanar with the surface of the semiconductor substrate;
• providing overall an overlying conformal layer of a second chemical mechanical polish stop layer, whereby surfaces of parts of the first polish stop layer on the substrate surface and a part of the second polish stop layer in the centre of the trench are coplanar;
• and
• planarizing the resulting structure by chemical mechanical polishing to remove all parts of each layer extending above said coplanar surfaces of said parts of the first and second polish stop layers whereby the second polish stop layer in the centre of the trench prevents dishing of the trench filling material.