Amorphous silicon memory
AssigneeBritish Telecommunications public limited company
InventorsAlan E. Owen, Anthony J. Snell, Janos Hajto, Peter G. Lecomber, Mervyn J. Rose
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Abstract
An analogue memory device comprises a layer of doped amorphous silicon located between a first conducting layer metal contact layer of V, Co, Ni, Pd, Fe or Mn. It has been found that the selection of one of these metals as the contact exerts a significant effect on the properties of the device, e.g. the selection of Al, Au or Cu gives no switching whereas Cr, W, Ag give digital instead of analogue switching.
Claims11
An analog memory device capable of being set and reset to a resistance value over a continuous range of resistance values which is a measure of a voltage applied to it over a corresponding range of voltage values, said analog memory device comprising:
- a first conducting layer (a);
- a single thin layer (b) in direct electrical contact with layer (a);
- a metal top contact (c) in electrical contact with layer (b) without interposition of an intermediate conductive layer, the metal being one of V, Co, Ni, Pd, Fe or Mn;
- wherein layer (b) exhibits said range of resistance values and is located between layer (a) and layer (c), said layer (b) being formed by one of (i) pure or doped amorphous silicon, (ii) pure or doped amorphous hydrogenated silicon or (iii) a hydrogenated silicon alloy;
- and
- wherein layer (b) has been subjected to a voltage sufficiently high to convert it into an analog memory device exhibiting said range of settable resistance values.
A method of making an analog memory device capable of being set and rest into a resistance over a continuous range of more than two resistance values which is a measure of a voltage applied to it over a corresponding range of voltage values, said method comprising the steps of:
- (i) depositing a first conducting layer (a) directly on an insulating substrate;
- (ii) depositing a thin layer (b) of one of (i) pure or doped amorphous silicon, (ii) pure or doped amorphous hydrogenated silicon or (iii) a hydrogenated silicon alloy on layer (a);
- (iii) depositing a contact layer (c) of V, Co, Ni, Pd, Fe or Mn on layer (b) without interposition of an intermediate conductive layer;
- (iv) applying a first forming voltage to the device, said voltage being sufficient to permanently reduce the resistance of the device;
- and
- (v) applying a second voltage to further reduce the resistance of the element.
An analog memory device for use in a neural network as a variable resistance element that can be set and reset to any resistance within a continuous range of resistance values as a function of voltage applied thereto, said analog memory device comprising:
- a single layer of amorphous silicon grown directly over a first electrical contact layer;
- a second electrical contact layer of V, Co, Ni, Pd, Fe or Mn grown over said single layer of amorphous silicon without interposition of an intermediate conductive layer;
- said single layer of amorphous silicon being altered after growth thereof by application of a forming voltage sufficient to convert this layer into a variable resistance element that can thereafter be reliably set and reset to retain any resistance within a continuous range of resistance values as a function of voltage applied thereto until subsequently again set or reset to a different value of resistance.
Dependencies are inferred from the claim text.