Oxidation enhancement in narrow masked field regions of a semiconductor wafer

Method of forming semiconductor circuit devices formed on a semiconductor wafer substrate which include, as a part of each device, a plurality of active regions separated by field regions, wherein some of the field regions have narrow width dimension as compared to other field regions on the device, wherein an initial dielectric layer is formed over the substrate, a buffer layer of semiconductor material is formed over the initial dielectric layer, a further dielectric layer is deposited and photopatterned in order to define field regions, field oxide is formed in said defined field regions, the formation of field oxide consuming the buffer layer at the field regions, and removing said further dielectric layer, the method further comprising:

• a) selecting areas on the wafer for retardation of an oxidation rate of the other field regions;
• b) applying photoresist and patterning the photoresist in order to expose said selected areas to an impurity while covering said field regions having said narrow width dimension;
• and
• c) applying an impurity to said substrate at said exposed selected areas, whereby the impurity retards the oxidation rate at said selected areas so that the oxidation growth in the exposed selected regions is equal to the oxidation growth in the field regions having narrow width dimension, thereby reducing a thinning effect at said field regions having a narrow width dimension.

A LOCOS field isolation process for sub-micron circuitry to be constructed on a silicon substrate, comprising the following sequence of steps, which begins following the creation of an N-well and a P-well within said substrate:

• a) creation of a pad oxide layer on top of said n-well and p-well regions;
• b) deposition of a silicon nitride layer on top of the pad oxide layer;
• c) masking said silicon nitride layer in future active regions with photoresist, thereby defining first and second field regions, wherein said second field regions have a narrow width dimension as compared to said first field regions;
• d) anisotropically etching away those portions of said thick silicon nitride layer that are not subject photoresist, with remnants of the thick silicon nitride layer remaining wherever covered with photoresist;
• e) stripping the photoresist used to mask said thick silicon nitride layer;
• f) selecting areas on the wafer for retardation of an oxidation rate of said first field regions;
• g) performing a masked implant at said selected areas, the implant retarding the oxidation rate of selected field regions in said selected areas;
• h) thermally growing field oxide on the surface of said substrate except where masked with said nitride layer remnants, whereby said retarded oxidation rate at said selected areas is such that the oxidation growth in the selected areas is equal to the oxidation growth in the second field regions which thereby results in a reduced oxide thinning effect at said second field regions having said narrow width dimension;
• and
• i) removing said nitride layer remnants with a nitride etch.

Method of forming semiconductor circuit devices which include, as a part of each device, a plurality of isolation regions having a thick oxide layer, wherein some of the isolation regions have a narrow width dimension as compared to other isolation regions on the device, the method comprising:

• a) providing a semiconductor substrate;
• b) creation of a pad oxide layer;
• c) deposition of a silicon nitride layer on top of the pad oxide layer;
• d) masking said silicon nitride layer in future active regions with photoresist, thereby defining field regions;
• e) anisotropically etching away those portions said thick silicon nitride layer that are not subjacent photoresist, with remnants of the thick silicon nitride layer remaining wherever covered with photoresist;
• f) stripping the photoresist used to mask said thick silicon nitride layer;
• g) selecting areas on the wafer for retardation of an oxidation rate of the other field regions;
• h) performing a masked implant at said selected areas, thereby reducing a thinning effect at field regions having a narrow width dimension;
• i) thermally growing field oxide on the surface of said substrate except where masked with said nitride layer remnants;
• and
• j) removal of said nitride layer remnants with a nitride etch.

Method of forming semiconductor circuit devices formed on a semiconductor wafer substrate which include, as a part of each device, a plurality of active regions separated by field regions, wherein some of the field regions have a narrow width dimension as compared to other field regions on the device, wherein an initial dielectric layer is formed over the substrate, a further dielectric layer is deposited and photopatterned in order to define field regions, field oxide is formed in said defined field regions, and removing said further dielectric layer, the method further comprising:

• a) selecting areas on the wafer for retardation of an oxidation rate of the other field regions;
• b) applying photoresist and patterning the photoresist in order to exposed said selected areas to an impurity while covering up said field regions having said narrow width dimension;
• c) applying an impurity to said substrate at said exposed field regions, whereby the impurity applied to exposed field regions results in a retarded oxidation rate;
• and
• d) removing said further dielectric layer.