# US 5,353,309 A · ISDN transmitter

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- Number: US 5,353,309 A
- Document ID: US5353309A
- Status: Granted
- Kind: A
- Application number: 07/877,902
- Filed: 1992-05-01
- Granted: 1994-10-04
- Earliest claimed: 1992-05-01
- Assignees: AT&T Bell Laboratories
- Inventors: Oscar E. Agazzi; Steven R. Norsworthy
- Web page: https://patentgrep.com/patent/US5353309A

## CPC

- H04L 25/4919: {using balanced multilevel codes (H04L25/4927 takes precedence)}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A transmitter suitable for ISDN use feeds the 2B1Q transmit signals directly into a sigma-delta modulator. The input word is two or three bits and the datapath within the sigma-delta modulator need be only six bits wide. The sigma-delta modulator has sample-hold means which has some filtering effect. The additional filtering requirements are met with an analog filter. No digital interpolation filter is required.

## Claims

### Claim 1

A transmitter comprising:
an encoder for receiving an incoming digital data stream at a first clock rate and converting it into digital PCM levels at a second clock rate;
a transmit clock which is connected to the encoder and comprises means for adjusting the phase of the data stream;
a sigma-delta modulator which receives the data stream from the encoder and operates at a third clock rate; and
a filter, said filter comprising means for sample-hold at a third-clock rate connected to said modulator, and an analog filter which receives the output from said sigma-delta modulator.

### Claim 2 (depends on 1)

A transmitter as recited in claim 1 in which said digital PCM levels comprise a 2B1Q data stream.

### Claim 3 (depends on 1)

A transmitter as recited in claim 1 in which said second clock rate and said third clock rate are independent.

### Claim 4 (depends on 1)

A transmitter as recited in claim 1 further comprising means for changing the phase of the data stream in increments of the sampling period of the sigma-delta modulator.

### Claim 5 (depends on 4)

A transmitter as recited in claim 4 in which said analog filter comprises a series connected first order switched capacitor filter and a first order passive RC filter.

### Claim 6

A device comprising:
means for receiving a digital data stream and encoding it into digital pulse code modulated levels;
means for adjusting the phase of said digital pulse code modulated levels;
sample-hold means for receiving said phase-adjusted digital pulse code modulated levels;
sigma-delta modulator for receiving the signal from said sample-hold means and encoding said signal into a 1-bit data stream; and
a low pass filter for said 1-bit data stream.

### Claim 7 (depends on 6)

A device as recited in claim 6 in which said digital pulse code modulated levels comprise 2B1Q levels.

### Claim 8 (depends on 6)

A device as recited in claim 6 further comprising a free-running clock for said sigma-delta modulator.

### Claim 9 (depends on 6)

A device as recited in claim 6 in which said low pass filter comprises an analog filter comprising a series connected first order switched capacitor filter and a first order passive RC filter.