# US 5,353,240 A · Apparatus and method for automatically testing computing equipment

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- Number: US 5,353,240 A
- Document ID: US5353240A
- Status: Granted
- Kind: A
- Application number: 08/035,008
- Filed: 1993-03-22
- Granted: 1994-10-04
- Earliest claimed: 1993-03-22
- Assignees: Dell USA, L.P.
- Inventors: Joseph D. Mallory; Bryan R. Franklin
- Web page: https://patentgrep.com/patent/US5353240A

## CPC

- G06F 11/273: Tester hardware, i.e. output processing circuits {(G06F11/263 takes precedence)}
- G06F 11/0757: {by exceeding a time limit, i.e. time-out, e.g. watchdogs}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A test apparatus and method for automatically testing computing equipment. The test apparatus comprises (1) a switch circuit, coupled to the computing equipment, capable of interrupting and restoring power to the computing equipment, (2) a timer, coupled to the switch circuit, capable of commanding the switch circuit to interrupt power to the computing equipment for a predetermined period of time and (3) a test circuit, coupled to the timer and the computing equipment, capable of determining when the switch circuit has restored power to the computing equipment and whether the computing equipment has successfully restarted following restoration of power. The test apparatus allows a laptop or desktop personal computer to be automatically boot tested, the apparatus having the capacity to display test status to remote users.

## Claims

### Claim 1

A test apparatus for testing computing equipment, comprising:
a switch circuit, coupled to said computing equipment, for interrupting and restoring power to said computing equipment;
a timer, coupled to said switch circuit, for commanding said switch circuit to interrupt power to said computing equipment for a predetermined period of time in response to a control signal asserted by said computing equipment and for causing said switch circuit to restore power to said computing equipment following said predetermined period of time; and
a test circuit, coupled to said timer and said computing equipment, for determining when said switch circuit has restored power to said computing equipment and whether said computing equipment has successfully restarted following restoration of power.

### Claim 2 (depends on 1)

The test apparatus as recited in claim 1 wherein said test circuit receives a condition signal from said computing equipment, said condition signal representing whether said computing equipment has successfully restarted following restoration of power.

### Claim 3 (depends on 1)

The test apparatus as recited in claim 1 wherein said switch circuit, said timer and said test circuit are detachably coupled to said computing equipment.

### Claim 4 (depends on 1)

The test apparatus as recited in claim 1 wherein said switch circuit, said timer and said test circuit detachably couple to a keyboard port on said computing equipment.

### Claim 5 (depends on 1)

The test apparatus as recited in claim 1 further comprising a power supply coupled to said switch circuit for supplying power to said computing equipment via said switch circuit.

### Claim 6 (depends on 1)

The test apparatus as recited in claim 1 wherein said test circuit is for determining whether said computing equipment has taken longer than a predetermined maximum period of time to successfully restart.

### Claim 7 (depends on 1)

The test apparatus as recited in claim 1 further comprising means for receiving a condition signal from said computing equipment, said condition signal representing a condition of said computing equipment following said passage of said period of time.

### Claim 8 (depends on 7)

The test apparatus as recited in claim 7 wherein said condition signal indicates whether said computing equipment successfully restarted following said passage of said period of time.

### Claim 9

A test apparatus for computing equipment, comprising:
means for storing in memory a time signal representing a period of time of temporary power interruption appropriate for said computing equipment;
means, under control of a processor, for temporarily interrupting power to said computing equipment for said period of time in response to a control signal asserted by said computing equipment and for restoring power to said computing equipment following said period of time; and
means for determining whether said computing equipment has successfully restarted following passage of said period of time.

### Claim 10 (depends on 9)

The test apparatus as recited in claim 9 further comprising means for displaying whether said computing equipment has successfully restarted following said passage of said period of time.

### Claim 11 (depends on 9)

The test apparatus as recited in claim 9 further comprising detachable means for coupling said test apparatus to said computing equipment.

### Claim 12 (depends on 11)

The test apparatus as recited in claim 11 wherein said detachable coupling means attaches to a keyboard port on said computing equipment.

### Claim 13 (depends on 9)

The test apparatus as recited in claim 9 further comprising switchable means for supplying power to said computing equipment.

### Claim 14 (depends on 9)

The test apparatus as recited in claim 9 further comprising means for determining whether said computing equipment has taken longer than a predetermined maximum period of time to successfully restart.

### Claim 15

A method of testing computing equipment comprising the steps of:
storing in memory a time signal representing a period of time of temporary power interruption appropriate for said computing equipment;
counting said period of time with a processor;
receiving a control signal from said computing equipment, said control signal representing a command to said processor to begin counting said period of time;
temporarily interrupting power to said computing equipment for said period of time; and
determining whether said computing equipment has successfully restarted following passage of said period of time.

### Claim 16 (depends on 15)

The method of testing as recited in claim 15 further comprising the step of receiving a condition signal from said computing equipment, said condition signal representing a condition of said computing equipment following said passage of said period of time.

### Claim 17 (depends on 16)

The method of testing as recited in claim 16 wherein said condition signal indicates whether said computing equipment has successfully restarted following said passage of said period of time.

### Claim 18 (depends on 15)

The method of testing as recited in claim 15 further comprising the step of displaying whether said computing equipment has successfully restarted following said passage of said period of time.

### Claim 19 (depends on 15)

The method of testing as recited in claim 15 further comprising the step of detachably coupling a test apparatus performing said method of testing to said computing equipment.

### Claim 20 (depends on 19)

The method of testing as recited in claim 19 wherein said step of detachably coupling comprises the step of attaching said test apparatus to a keyboard port on said computing equipment.

### Claim 21 (depends on 15)

The method of testing as recited in claim 15 further comprising the step of switchably supplying power to said computing equipment.

### Claim 22 (depends on 15)

The method of testing as recited in claim 15 further comprising the step of determining whether said computing equipment has taken longer than a predetermined maximum period of time to successfully restart.

### Claim 23

A system for testing a personal computer, comprising:
a switch circuit for coupling a power supply to said personal computer and for interrupting and restoring power to said personal computer;
a timer, coupled to said switch circuit, for commanding an interruption of power to said personal computer and, following passage of a predetermined period of time, for commanding a restoration of power to said personal computer;
a test circuit, coupled to said timer and said personal computer, for determining when said switch circuit has restored power to said personal computer and whether said personal computer has successfully restarted following restoration of power, said test circuit receiving a condition signal from said personal computer, said condition signal representing whether said personal computer has successfully restarted following restoration of power, said test circuit further for determining whether said personal computer has taken longer than a predetermined maximum period of time to successfully restart, and wherein said test circuit is detachably coupled to a keyboard port of said personal computer; and
a display, coupled to said test circuit, for indicating to an operator whether said personal computer has succeeded in restarting or has failed to restart.

### Claim 24 (depends on 23)

The system as recited in claim 23 wherein said personal computer is a laptop personal computer.

### Claim 25

A system for testing computing equipment, comprising:
a test apparatus including memory, an input port, an output port, and a processor coupled to said memory, said input port, and said output port;
means for coupling said input and output ports to said computing equipment via a port on said computing equipment, wherein said test apparatus further includes:
means for switchably providing power from said test apparatus to said computing equipment via said output port;
means for storing in said memory a time signal received from said computing equipment via said input port, said time signal representing a period of time of temporary power interruption appropriate for said computing equipment;
means, under control of said processor, for temporarily disconnecting power to said computing equipment for said period of time;
means for restoring said power to said computing equipment following passage of said period of time; and
means, under control of said processor, for determining and displaying whether said computing equipment has successfully restarted following passage of said period of time.

### Claim 26 (depends on 25)

The system as recited in claim 25 further comprising means for receiving a condition signal from said computing equipment via one of said input ports, said condition signal representing a condition of said computing equipment following said passage of said period of time, said condition signal indicating whether said computing equipment has successfully restarted following passage of said period of time.
