# US 5,350,707 A · Method for making a capacitor having an electrode surface with a plurality of trenches formed therein

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 5,350,707 A
- Document ID: US5350707A
- Status: Granted
- Kind: A
- Application number: 07/974,735
- Filed: 1992-11-13
- Granted: 1994-09-27
- Earliest claimed: 1991-11-19
- Assignees: Samsung Electronics Co., Ltd.
- Inventors: Jaehong Ko; Sungtae Kim; Hyunbo Shin; Seonghun Kang
- Web page: https://patentgrep.com/patent/US5350707A

## CPC

- H10B 12/033: {the capacitor extending over the transistor}
- H10B 12/318: {the storage electrode having multiple segments}
- H10D 1/043: {using patterning processes to form electrode extensions, e.g. etching}
- H10D 1/66: Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
- H10D 1/714: {having horizontal extensions}
- H10D 1/716: {having vertical extensions}
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

The present invention provides a semiconductor device having a capacitor that is formed through: a first step of forming a polysilicon layer having a rough surface after a nonconductive layer is applied to a base substrate; a second step of etching back away the polysilicon layer to expose the nonconductive layer and thus remaining islandlike polysilicon layers; a third step of etching the nonconductive layer, using the remained polysilicon layers as an etching mask; a fourth step of etching the base substrate of the capacitor, using the nonconductive layer as a mask; a fifth step of forming a pattern of the base substrate of the capacitor after the removal of the remained nonconductive layer; a sixth step of forming an upper substrate of the capacitor after the formation of a dielectric film of the capacitor. According to this invention, the surface area of the capacitor electrode is remarkably enhanced such that the integrity of DRAMs is more improved.

## Claims

### Claim 1

A method for making a capacitor, comprising the steps of:
forming a first conductive layer on a major surface of a substrate;
patterning said first conductive layer, to thereby form a first patterned layer;
forming a first oxide film on said first patterned layer and exposed portions of said major surface of said substrate;
forming a silicon nitride film on said first oxide film;
oxidizing said silicon nitride film, to thereby form a second oxide film;
wherein a plurality of pinholes are formed in said silicon nitride film during said oxidizing step, to thereby form a second patterned layer;
removing said second oxide film and exposed portions of said first oxide film:
etching said first conductive layer, using said second patterned layer as a mask, to thereby form a plurality of microscopic trenches in said first conductive layer;
removing remaining portions of said first oxide film and said second patterned layer; and,
forming a dielectric film on said first patterned layer; and,
forming a second conductive layer on said dielectric film.

### Claim 2 (depends on 1)

The method as set forth in claim 1, wherein said first conductive layer is a material selected from a group consisting of polysilicon doped with impurities and monocrystalline silicon doped with impurities.

### Claim 3 (depends on 2)

The method as set forth in claim 2, wherein said first conductive layer has a thickness of 2000 to 4000 angstroms.

### Claim 4 (depends on 3)

The method as set forth in claim 3, wherein said first oxide film has a thickness of 50 to 2000 angstroms.

### Claim 5 (depends on 4)

The method as set forth in claim 4, wherein said silicon nitride film has a thickness of 30 to 500 angstroms.

### Claim 6 (depends on 1)

The method as set forth in claim 1, wherein said step of etching said first conductive layer is carried out by means of an anisotropic ethcing process.

### Claim 7 (depends on 1)

The method as set forth in claim 1, wherein said second conductive layer is a material selected from a group consisting of polysilicon doped with impurities and monocrystalline silicon doped with impurities.

### Claim 8 (depends on 1)

The method as set forth in claim 1, wherein said dielectric film is comprised of a plurality of individual layers laminated together.