Integrated circuit programmable sequencing element apparatus

An integrated circuit comprising:

• a PROM which receives respective n-bit PROM address signals and which provides a plurality of M PROM output signals including at least n first PROM output signals, M being greater than n;
• external signal means for receiving from an external environment at least one external signal;
• programmable sequencing element (PSE) means for providing at least n PSE output signals, said PSE means being responsive to at least one stored version of the at least n first PROM output signals;
• selection means, coupled to the PROM and to the PSE means, for selecting the respective n-bit PROM address signals from among the at least n first PROM output signals and the at least n PSE signals;
• output storage means for storing the at least n first PROM output signals and for providing stored versions of the at least n first PROM output signals to the programmable sequencing element (PSE) means;
• output selection means for selecting between the at least n first PROM output signals and the stored versions of the at least n first PROM output signals;
• and
• feedback means for providing the stored versions of the at least n first PROM output signals to said selection means;
• wherein said external signal means, alternatively, provides to the external environment a programmably-selected one or more of the at least n first PROM output signals or provides to the external environment a programmably-selected one or more of the stored versions of the at least n first PROM output signals or receives from the external environment the at least n external signals.

An integrated circuit comprising:

• a PROM which receives respective n-bit PROM address signals and which provides a plurality of M PROM output signals including at least n first PROM output signals and at least one control signal;
• external signal means for alternatively receiving from an external environment at least one external signal or providing to the external environment the at least n first PROM output signals;
• programmable sequencing element (PSE) means for providing at least n PSE output signals, said PSE means being responsive to the at least one control signal;
• storage means for storing the at least one external signal;
• first output storage means for storing the at least n first PROM output signals;
• second output storage means for storing the at least one control signal;
• and
• selection means, coupled to the PROM and to the PSE means, for selecting the respective n-bit PROM address signals from among the at least n first PROM output signals and the at least n PSE signals.

An integrated circuit comprising:

• a PROM which receives respective n-bit PROM address signals and which provides a plurality of M PROM output signals;
• external signal means for receiving respective at least n-bit external signals from an external environment;
• storage means for storing the respective at least n-bit external signals and for providing stored versions of the respective at least n-bit external signals;
• address counter means for incrementing respective n-bit counter signals to produce respective n-bit incremented counter signals;
• and
• selection means, coupled to the PROM and to the storage means and to the address counter means, for selecting the respective n-bit PROM address signals from among the respective incremented counter signals, the respective at least n-bit external signals, and the stored versions of the at least n-bit external signals;
• wherein said counter means receives a respective n-bit PROM address signal selected by said selection means and produces respective incremented versions of the selected respective n-bit PROM address signal as the respective incremented counter signals.