# US 5,349,611 A · Recovering synchronization in a data stream

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- Number: US 5,349,611 A
- Document ID: US5349611A
- Status: Granted
- Kind: A
- Application number: 08/003,896
- Filed: 1993-01-13
- Granted: 1994-09-20
- Earliest claimed: 1992-11-13
- Assignees: Ampex Systems Corporation
- Inventors: George R. Varian
- Web page: https://patentgrep.com/patent/US5349611A

## CPC

- H04L 7/043: {Pseudo-noise [PN] codes variable during transmission (synchronisation of spread spectrum receivers H04B1/69)}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Input data symbols are written in a write buffer then to a sync adder, which appends a pseudo randomly (PN) generated sync bit to the MSB position of a four-symbol sync word data field, to generate a sync word. Sync words may or may not be randomized and sent to a receiver whereafter synchronization is recovered and perhaps de-randomized symbols are written into particular positions of an ECC block in a read buffer which are derivable from the PN sequence. The ECC block is a data array having multi-bit sync words making up its rows and the bit positions of the sync words making up its columns. Synchronization recovery apparatus conceptually looks at each bit position across a row and in a top-to-bottom direction down each of the columns to locate that column which contains the appended PN sequence. Sync recovery involves the receiver re-generating the same PN sequence that was generated at the transmitter. When the sync bit position is found, the data stream is assembled into fixed length sync words and written into the read buffer. Further, the position of the sync bit in the PN sequence is used to generate an address for writing the ECC codeword in a read buffer. Synchronization recovery circuit passes along to the read buffer both ECC codeword data symbols and sync bit position in the form of a read buffer address. Error rate measurement can be done by comparing a received PN sequence with a reconstructed PN sequence.

## Claims

### Claim 1

A synchronization recovery system comprising:
means for associating a state of a transmitter pseudo-random (PN) generator with a data location in a write buffer;
means for associating a state of a receiver PN detector with a data location in a read buffer;
the transmitter PN generator and the receiver PN detector each being respectively adapted for generating and detecting a common PN sequence;
means for appending a bit from a PN sequence output of the transmitter PN generator to data read from a write buffer data location to generate a sync word;
means for receiving the generated sync word;
means responsive the PN sequence from the receiver PN detector for locating the appended PN sequence bit in the received sync word;
means for determining a PN state corresponding to the appended PN bit from the PN sequence in the received sync word; and
means responsive to the determined PN state for associating the PN state of the received sync word with a data location in the read buffer.

### Claim 2 (depends on 1)

The system defined in claim 1 further comprising:
means responsive to the determined PN state for aligning word boundaries of the received sync word with respect to the location of the appended PN sequence bit within the PN sequence.

### Claim 3 (depends on 1, 2)

The system defined in claims 1 or 2 wherein the means for associating the PN state of the received sync word with a data location in the read buffer comprises:
means for associating the state of the PN sequence with data locations in the read buffer so that data from the received sync word can be written into locations in the read buffer which correspond to locations the data occupied in the write buffer.

### Claim 4 (depends on 1, 2)

The system defined in claims 1 or 2 wherein the means for associating the PN state of the received sync word with a data location in the read buffer further comprises:
means for resetting the transmitter PN generator to an initial state prior to reading the first data location from the write buffer, and
means for advancing the state of the transmitter PN generator prior to the reading of each subsequent write buffer location.

### Claim 5 (depends on 3)

The system defined in claim 3 wherein the means for associating the state of the PN sequence with data locations between the write buffer and the read buffer comprises:
means for looking up the read buffer address corresponding to state of the PN sequence in a memory table.

### Claim 6 (depends on 1, 2)

The system defined in claims 1 or 2 further comprising:
data delay buffer means for introducing a delay, the introduced delay matching a nominal time required
(a) for the locating means to identify the location of the appended PN sequence as recovered in the received sync word and
(b) for the determining means to identify the state corresponding to that recovered PN sequence.

### Claim 7 (depends on 6)

The system defined in claim 6 further comprising:
finite field multiplier means for adjusting the state of the recovered PN sequence and for adjusting the delay introduced by the data delay buffer means.

### Claim 8 (depends on 1, 2)

The system defined in any of claims 1 or 2 wherein the means for appending a sync word comprises:
means responsive to the PN state for randomizing the generated sync word and
means for providing the randomized generated sync word as the generated sync word.

### Claim 9 (depends on 8)

The system defined in claim 8 wherein the randomizing means comprises:
means for generating the exclusive OR of the PN state and the majority of a predetermined number of the bits of the PN state appended to the compliment of the exclusive OR of the PN state and the majority of the predetermined number of the bits of the PN state.

### Claim 10 (depends on 9)

The system defined in claim 9 where the predetermined number of the bits is three bits.

### Claim 11 (depends on 1, 2)

The system defined in any of claims 1 or 2 further comprising:
means responsive to the PN state for de-randomizing the received sync word; and
means for providing the de-randomized generated sync word to the read buffer as the received sync word.

### Claim 12

Data synchronization apparatus comprising:
means for applying a reversible operation to a word in a sequence of data words in a data stream and for applying a first function to a pseudo-random (PN) state of a PN generator that corresponds to the word;
means for appending a bit to the word prior to transmitting the word in a data stream where the appended bit corresponds to the state of the PN generator;
means for discovering the location of the PN sequence in the data stream of received data and for determining the PN state corresponding to that PN sequence;
means for aligning received word boundaries with respect to the location of the PN sequence; and
means for applying the reverse of the reversible operation to each received word and for applying the first function to the PN state associated with the PN sequence bit which was appended to the word thus restoring the original data.

### Claim 13 (depends on 12)

The data synchronization apparatus defined in claim 12 wherein:
the means for applying a reversible operation to a word includes means for providing a modulo 2.sup.N addition over a set of bit fields in the word, and wherein:
the means for applying the reverse of the reversible operation to each received word includes means for providing a modulo 2.sup.N subtraction for over a set of bit fields in the word.

### Claim 14 (depends on 13)

The data synchronization apparatus defined in claim 13 where all the bit fields are single bits and where:
the means for applying the reverse of the reversible operation includes means for providing modulo 2 addition and an exclusive 0R function.

### Claim 15 (depends on 12)

The data synchronization apparatus defined in claim 12 where the means for applying a first function to a pseudo-random (PN) state of a PN generator that corresponds to the word includes: means for providing the exclusive OR of the PN state and the majority of a predetermined number of the bits of the PN state appended to the compliment of the exclusive OR of the PN state and the majority of the predetermined number of the bits of the PN state.

### Claim 16 (depends on 15)

The data synchronization apparatus defined in claim 15
where the majority is over bits 0, 4, and 11 counting the least significant bit (LSB) as bit 0 and the most significant bit (MSB) as bit 15 and
where the coefficients of the PN generator polynomial are x.sup.16 +x.sup.12 x.sup.3 +x+1.

### Claim 17 (depends on 12)

The data synchronization apparatus defined in claim 12 further comprising:
data delay buffer means for providing a delay matching the nominal time required for the discovering and determining means
(a) to discover the location in the received data word of the bit that was appended to the data word from the PN sequence; and
(b) to determine the PN state of a recovered PN sequence that corresponds to the discovered location.

### Claim 18 (depends on 17)

The data synchronization apparatus defined in claim 17 further comprising:
finite field multiplier means for adjusting the PN state of the recovered PN sequence and for adjusting the delay introduced by the data delay buffer means.

### Claim 19

Synchronization recovery apparatus comprising:
means for determining a bit location of a sync bit in a data stream where the sync bit is a bit from a pseudo-random (PN) generated sequence;
means responsive to the sync bit in the determined bit location for detecting a PN state corresponding to the sync bit in the PN sequence,
the bit location determining means and PN state detecting means comprising:
an array of correlators, each correlator including:
a PN state detector and
counter and control means;
means for selecting an output from a correlator; and
flywheel means responsive to the detected PN state and to the counter and control means for operating the selected correlator so as to use or not to use the output of a PN generator and correlator position as the PN state and as the bit location of the sync bit, respectively.

### Claim 20 (depends on 19)

The synchronization recovery apparatus of claim 19 wherein the flywheel means further comprises:
means operative when the output of the PN generator and correlator position are not used as the PN state and as the bit location of the sync bit, respectively, for providing as the PN state and the bit location of the sync bit, respectively, values that were determined from previous information to be the PN state and the bit location of the sync bit, respectively.

### Claim 21 (depends on 19, 20)

The synchronization recovery apparatus defined in claims 19 or 20 further comprising:
means responsive to a count threshold for signaling whether a correlator is locked or not locked.

### Claim 22 (depends on 21)

The synchronization recovery apparatus defined in claim 21 further comprising:
means responsive to the correlator being locked for storing the bit location of the sync bit and the PN state from the locked correlator for later use as the previously determined information.

### Claim 23 (depends on 21)

The synchronization recovery apparatus defined in claim 21 further comprising:
means responsive to exactly one correlator being locked for providing the bit location and the PN state from that locked correlator.

### Claim 24 (depends on 19, 20)

The synchronization recovery apparatus defined in claims 19 or 20 further comprising:
means responsive either to no correlators being locked or to more than one correlator being locked for providing as the bit location of the sync bit and as the PN state, respectively, values from the previously determined information.

### Claim 25 (depends on 19, 20)

The synchronization recovery apparatus defined in claims 19 or 20 where:
the means for selecting the correlator output includes:
a binary tree of nodes where each node has two inputs and one output and
means for determining if zero, one, or more than one of the correlators extending a respective output to at least one node are locked and for providing the result of that determination to the flywheel means.

### Claim 26

A system for recovering synchronization of data symbols between a transmitter and a receiver, the system comprising:
transmitter means for buffering error correcting code (ECC) codewords, each ECC codeword including at least one data symbol;
transmitter means for converting buffered ECC codewords into a sync word data field;
transmitter means for respectively appending a pseudo-randomly (PN) generated sync pattern to each of a plurality of sync word data fields;
receiver means responsive to the transmitter PN generated sync pattern for recovering synchronization and for aligning a data symbol into its proper position in a received ECC codeword;
means for receiving an ECC block of sync words, a sync word being formed by a transmitter appending a sync bit from the pseudo-randomly generated sync pattern to a sync word data field;
means for detecting the pseudo-random pattern of sync bits in a plurality of the Sync words of the ECC block; and
means responsive to the detected pseudo-random pattern for generating addresses in a read buffer into which the symbols from the plurality of sync words are to be written.

### Claim 27

Synchronization recovery apparatus comprising:
means for receiving a word of predetermined size, the received word including a first pseudo-randomly generated sync bit from a pseudo-random (PN) sequence;
means for generating a second pseudo-randomly generated sync bit sequence, where the second pseudo-randomly generated sync bit sequence is a reconstruction of the first pseudo-randomly generated sync bit sequence;
means for correlating a bit of a received word with a bit from the second, reconstructed pseudo-randomly generated bit sequence; and
means responsive to the correlation for aligning the received word as an aligned sync word;
means responsive to the alignment for identifying a sync bit in the aligned sync word; and
means responsive to the sync bit in the aligned sync word for generating an address for writing the aligned sync word in a read buffer.

### Claim 28

Synchronization recovery apparatus comprising:
means for receiving a word of predetermined size, the received word including a first pseudo-randomly generated sync bit from a pseudo-random (PN) sequence;
means for generating a second pseudo-randomly generated sync bit sequence, where the second pseudo-randomly generated sync bit sequence is a reconstruction of the first pseudo-randomly generated sync bit sequence;
means for correlating a bit of a received word with a bit from the second, reconstructed pseudo-randomly generated bit sequence; and
means responsive to the correlation for aligning the received word as an aligned sync word;
means responsive to the reconstructed pseudo-randomly generated sync bit for determining a "most likely" bit position for a sync bit within the received word; and
means responsive to the reconstructed pseudo-randomly generated sync bit and responsive to the "most likely" sync bit position for generating an address corresponding to the sync word within the error correcting code (ECC) block.

### Claim 29

Synchronization recovery apparatus comprising;
means for receiving a word of predetermined size, the received word including a first pseudo-randomly generated sync bit from a pseudo-random (PN) sequence;
means for generating a second pseudo-randomly generated sync bit sequence, where the second pseudo-randomly generated sync bit sequence is a reconstruction of the first pseudo-randomly generated sync bit sequence;
means for correlating a bit of a received word with a bit from the second, reconstructed pseudo-randomly generated bit sequence; and
means responsive to the correlation for aligning the received word as an aligned sync word; and
means for writing the aligned sync word in a read buffer.

### Claim 30

Apparatus for associating a pseudo-random (PN) state of a first PN generator with data locations in a read buffer, the read buffer for storing data words, the apparatus comprising:
means for discovering the position of a PN sequence in a data stream of data words and for determining the PN state corresponding to the PN sequence in the data stream;
means responsive to an output from a PN detector and to the position of the PN sequence in the data stream for aligning word boundaries with respect to the location of the PN sequence; and
means for associating the PN state of the PN sequence in the data stream with locations in the read buffer so that data can be written into locations in the read buffer corresponding to those locations the data occupied in a write buffer.

### Claim 31 (depends on 30)

The apparatus defined in claim 30 further comprising:
means for resetting a second PN generator to an initial state prior to writing data in the read buffer and
means for advancing the PN state of the second PN generator prior to the writing into each subsequent read buffer location.

### Claim 32 (depends on 30)

The apparatus defined in claim 30 wherein the means for associating the PN state of the PN sequence in the data stream with data locations in a read buffer includes:
means for looking up the PN state corresponding to each position in the received PN sequence in a memory.

### Claim 33

Apparatus for applying a reversible operation to each word of a sequence of data words in a data stream, the apparatus comprising:
means responsive to each pseudo-random (PN) state of a PN generator for applying a first function to a data word; the first function including:
means responsive to the PN state for generating a randomizing bit pattern; and
means for applying the randomized bit pattern to the data word;
means for appending a corresponding bit from a PN sequence that is provided by the PN generator, the bit being appended to the data word prior to communicating the data word in the data stream;
means for discovering the location of the PN sequence in the data stream;
means for determining the PN state corresponding to the discovered PN sequence.

### Claim 34 (depends on 33)

The apparatus defined in claim 33 further comprising:
means for aligning word boundaries with respect to the location of the PN sequence in the data stream.

### Claim 35 (depends on 33, 34)

The apparatus defined in claims 33 or 34 further comprising:
means for applying the reverse of the reversible operation to each received word in the data stream and
means for applying the same first function of the PN state associated with PN sequence bit which was appended to the word thus restoring the original data.

### Claim 36 (depends on 33, 34)

The apparatus defined in claims 33 or 34 further comprising:
reversible operation means including means for providing a bit field-wise modulo 2.sup.N addition, and
reverse operation means including means for providing a bit field-wise modulo 2.sup.N subtraction for over a set of bit fields in the word.

### Claim 37 (depends on 36)

The apparatus defined in claim 36 where all the bit fields are single bits and where the reversible operation means further includes means for providing modulo 2 addition or the exclusive OR function.

### Claim 38 (depends on 37)

The apparatus defined in claim 37 where the first function is the exclusive OR of the PN state and the majority of three of the bits of the PN state appended to the compliment of the exclusive OR of the PN state and the majority of three of the bits of the PN state.

### Claim 39 (depends on 38)

The apparatus defined in claim 38 where the majority is over bits 0, 4, and 11 counting the least significant bit (LSB) as bit 0 and the most significant bit (MSB) as bit 15 and where the coefficients of the PN generator polynomial are x.sup.16 +x.sup.12 +x.sup.3 +x+1.

### Claim 40

A synchronization recovery method comprising the steps of:
associating a pseudo-random (PN) state of a transmitter PN generator with a data location in a write buffer;
appending a bit from a PN sequence from the transmitter PN generator to data read from the write buffer to generate a sync word;
transmitting the sync words in a bit stream;
locating the appended PN sequence bit position in received data words from the bit stream;
recovering the PN state corresponding to the received sync word from the received PN sequence;
responsive to the recovered PN state, associating the PN state of the received sync word with a data location in a read buffer; and
responsive to the PN sequence bit position in the received sync word, aligning word boundaries of the received sync word with respect to the location of the appended position within the PN sequence.

### Claim 41 (depends on 40)

The method defined in claim 40 wherein the step of associating the PN state of the received sync word with a data location in a read buffer comprises the step of:
associating the state of the PN sequence with data locations in the read buffer so that data from the received sync word can be written into locations in the read buffer which correspond to locations the data occupied in the write buffer.

### Claim 42 (depends on 40)

The method defined in claim 40 wherein the step of associating the PN state of the received sync word with a data location in a read buffer further comprises the steps of:
resetting the transmitter PN generator to an initial state prior to reading the first data location from the write buffer, and
advancing the state of the transmitter PN generator prior to the reading of each subsequent write buffer location and
wherein the step of correlating the state of the PN sequence with data locations between a write buffer and a read buffer comprises the step of:
looking up the state corresponding to each bit position in the recovered PN sequence in a table of a memory.

### Claim 43 (depends on 42)

The method defined in claim 42 further comprising the steps of:
introducing a delay in the received sync words, the introduced delay matching a nominal time required
(a) for identifying the location of the appended PN sequence as recovered in the received sync word and
(b) for identifying the state corresponding to the recovered PN sequence.

### Claim 44 (depends on 43)

The method defined in claim 43 further comprising the step of:
adjusting the state of the recovered PN sequence and adjusting the delay introduced by the data delay buffer means.

### Claim 45 (depends on 40, 41, 42, 43)

The method defined in any of claims 40, 41, 42, 43, or 44 wherein the received sync word is generated by the step of:
responsive to the transmitter PN state, randomizing the sync word and providing the randomized generated data word as the received sync word.

### Claim 46 (depends on 45)

The method defined in any of claim 45 further comprising the steps of:
responsive to the recovered PN state in the receiver, de-randomizing the received sync word and
providing the de-randomized generated sync word to the read buffer.