# US 5,349,387 A · Apparatus for detecting polarity of an input signal

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- Number: US 5,349,387 A
- Document ID: US5349387A
- Status: Granted
- Kind: A
- Application number: 08/124,780
- Filed: 1993-09-21
- Granted: 1994-09-20
- Earliest claimed: 1993-09-21
- Assignees: Acer Peripherals, Inc.
- Inventors: Yung F. Fan Chiang; Kun M. Lee
- Web page: https://patentgrep.com/patent/US5349387A

## CPC

- G09G 1/16: the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The apparatus of the invention includes an edge detection circuit, a divide-by-N circuit and a latch. The edge detection circuit, responsive to an edge of the input signal, generates a trigger signal of a first frequency. The divide-by-N circuit inputs the trigger signal and generates a latch signal of a second frequency. The second frequency is equal to the first frequency divided by N. The latch inputs the input signal, and responsive to the latch signal, latches the input signal and outputs a polarity value representative of the polarity of the input signal.

## Claims

### Claim 1

All apparatus for detecting a polarity of an input signal, comprising:
edge detection means, responsive to an edge of said input signal, for generating a trigger signal of a first frequency;
divide-by-N means, inputing said trigger signal, for generating a latch signal of a second frequency, the second frequency being equal to tile first frequency divided by N;
latch means, inputing said input signal and in response to said latch signal, for latching said input signal and outputing a polarity value representative of the polarity of said input signal.

### Claim 2 (depends on 1)

The apparatus as recited in claim 1, wherein the divide-by-N means comprising:
a flip-flop, having a clock input terminal for inputing said trigger signal, a first output terminal (Q) for outputing said latch signal, a data input terminal and a second output terminal (-Q), the data input terminal and the second output terminal being coupled to each other.

### Claim 3 (depends on 1)

The apparatus as recited in claim 1, wherein the latch means comprising:
a flip-flop, having a data terminal for inputing said input signal, a clock input terminal for inputing said latch signal and an output terminal for outputing said polarity value.

### Claim 4 (depends on 1)

The apparatus as recited in claim 1, wherein the input signal being a horizontal synchronization signal of a video system.

### Claim 5 (depends on 1)

The apparatus as recited in claim 1, wherein the input signal being a vertical synchronization signal of a video system.

### Claim 6 (depends on 1)

The apparatus as recited in claim 1, wherein the N being equal to 2.