# US 5,349,233 A · Lead frame and semiconductor module using the same having first and second islands and three distinct pluralities of leads and semiconductor module using the lead frame

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- Number: US 5,349,233 A
- Document ID: US5349233A
- Status: Granted
- Kind: A
- Application number: 08/047,399
- Filed: 1993-04-19
- Granted: 1994-09-20
- Earliest claimed: 1992-04-20
- Assignees: Kabushiki Kaisha Toshiba
- Inventors: Akira Sasaki
- Web page: https://patentgrep.com/patent/US5349233A

## CPC

- H10W 90/811: {Multiple chips on leadframes}
- H10W 70/421: {Shapes or dispositions}
- H10W 70/468: {Circuit boards}
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A lead frame for a semiconductor module comprises a lead frame member having first and second islands and including first, second and third groups of outer leads. The first and second groups of outer leads are located in one direction at opposed sides of the lead frame member, and the third group of outer leads are located between the first and second islands in the direction. When the first and second semiconductor chips are mounted on the first and second islands, respectively, and encapsulated separately with a resin layer, the third group of outer leads serve as external leads.

## Claims

### Claim 1

A semiconductor module, comprising:
a lead frame member having an axis, said lead frame member including:
first and second islands spaced apart from each other; and
first, second, and third pluralities of leads extending parallel to said axis,
said first and second pluralities of leads extending outward from, said first and second islands; and
all of said third plurality of leads extending between said first and second islands;
first and second semiconductor chips mounted on said first and second islands, respectively, at least one of said chips being connected to at least one of said third plurality of leads; and
first and second resin bodies separately encapsulating said first and second semiconductor chips, respectively, and exposing said third plurality of leads.

### Claim 2 (depends on 1)

The semiconductor module according to claim 1, wherein said third plurality of leads comprise means for interconnecting said first and second semiconductor chips.

### Claim 3 (depends on 1)

The semiconductor module according to claim 1, wherein the third plurality of leads define a plane and the first and second islands are arranged with respect to the plane to provide the module with an outline having a relatively low dimension in comparison to length along the axis.

### Claim 4 (depends on 1)

The semiconductor module according to claim 1, wherein said third plurality of leads are bent and provide a so-called single in-line package, first and second ends of each of said third plurality of leads being substantially parallel to the axis.

### Claim 5 (depends on 1)

The semiconductor module according to claim 1, wherein said first and second semiconductor chips have different functions.
