# US 5,349,231 A · Apparatus and method for bidirectional current conduction

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 5,349,231 A
- Document ID: US5349231A
- Status: Granted
- Kind: A
- Application number: 08/079,187
- Filed: 1993-06-18
- Granted: 1994-09-20
- Earliest claimed: 1991-11-22
- Assignees: Texas Instruments Incorporated
- Inventors: Fernando D. Carvajal
- Web page: https://patentgrep.com/patent/US5349231A

## CPC

- H03K 17/166: {Soft switching}
- G05F 3/265: {using bipolar transistors only}
- H10D 84/645: {Combinations of only lateral BJTs}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method and apparatus are provided for bidirectional current conduction between first and second nodes of an electronic circuit. A first substantially constant current is conducted through a first current mirror pair of transistors coupled between the first and second nodes, in a first direction away from the first node toward the second node, in response to the first node having a voltage higher than the second node. A second substantially constant current is conducted through a second current mirror pair of transistors coupled between the first and second nodes, in a second direction away from the second node toward the first node, in response to the first node having a voltage lower than the second node.

## Claims

### Claim 1

A bilateral bipolar transistor device for bidirectional current conduction between first and second nodes of an electronic circuit, comprising:
a semiconductor layer having a first conductivity type;
a first region formed in said semiconductor layer, having a second conductivity type;
a second region formed in said semiconductor layer, spaced from said first region, and having said second conductivity type;
a third region formed in said semiconductor layer, spaced from and interposed between said first and second regions, having said second conductivity type and coupled to the first node; and
a fourth region formed in said semiconductor layer, spaced from and interposed between said third and second regions, having said second conductivity type and coupled to the second node, said first and second regions being coupled to a bias current source.

### Claim 2 (depends on 1)

The device of claim 1 and further comprising a semiconductor substrate having said second conductivity type, said semiconductor layer being formed over said semiconductor substrate.

### Claim 3 (depends on 1)

The device of claim 1 and further comprising a contact region formed in said semiconductor layer and coupled to said bias current source.

### Claim 4 (depends on 3)

The device of claim 3 wherein said first and second regions are coupled through said contact region to said bias current source.

### Claim 5 (depends on 1)

The device of claim 1 wherein said first conductivity type is N, and said second conductivity type is P.

### Claim 6 (depends on 3)

The device of claim 3 wherein said contact region forms an annular ring around a section of said semiconductor layer including said first, second, third and fourth regions.

### Claim 7 (depends on 3)

The device of claim 3 and further comprising an isolation region having said second conductivity type for isolating the device from an adjacent circuitry.

### Claim 8 (depends on 7)

The device of claim 7 wherein said isolation region forms a guard ring around a section of said semiconductor layer including said contact region and said first, second, third and fourth regions.

### Claim 9 (depends on 1)

The device of claim 1 wherein said semiconductor layer forms a base of a first transistor, said first region forms a collector of said first transistor, and said third region forms an emitter of said first transistor.

### Claim 10 (depends on 9)

The device of claim 9 wherein said semiconductor layer forms a base of a second transistor, said fourth region forms a collector of said second transistor, and said third region forms an emitter of said second transistor.

### Claim 11 (depends on 10)

The device of claim 10 wherein said semiconductor layer forms a base of a third transistor, said second region forms a collector of said third transistor, and said fourth region forms an emitter of said third transistor.

### Claim 12 (depends on 11)

The device of claim 11 wherein said semiconductor layer forms a base of a fourth transistor, said third region forms a collector of said fourth transistor, and said fourth region forms an emitter of said fourth transistor.

### Claim 13 (depends on 12)

The device of claim 12 wherein said first and second transistors form a first current mirror pair of transistors.

### Claim 14 (depends on 13)

The device of claim 13 wherein said first current mirror pair is operable to conduct a first substantially constant current in a first direction away from the first node toward the second node responsive to the first node having a voltage higher than the second node.

### Claim 15 (depends on 14)

The device of claim 14 wherein said third and fourth transistors form a second current mirror pair of transistors.

### Claim 16 (depends on 15)

The device of claim 15 wherein said second current mirror pair is operable to conduct a second substantially constant current in a second direction away from the second node toward the first node responsive to the first node having a voltage lower than the second node.