# US 5,349,229 A · Local interconnect for integrated circuits

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- Number: US 5,349,229 A
- Document ID: US5349229A
- Status: Granted
- Kind: A
- Application number: 07/830,129
- Filed: 1992-01-31
- Granted: 1994-09-20
- Earliest claimed: 1991-01-31
- Assignees: SGS-Thomson Microelectronics S.A.
- Inventors: Che-Chia Wei; Fu-Tai Liou
- Web page: https://patentgrep.com/patent/US5349229A

## CPC

- H10W 20/4451: {Semiconductor materials, e.g. polysilicon}
- H10W 20/066: {by forming silicides of refractory metals}
- H10W 20/0698: {Local interconnections}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Local interconnect is defined in a polycrystalline silicon layer. Openings to underlying conducting regions are made through an insulating layer after the local interconnect conductor definition. A thin extra polycrystalline silicon layer is then deposited over the device and etched back to form polycrystalline silicon sidewall elements. These sidewalls connect the polycrystalline silicon local interconnect conductors to the underlying conductive regions. Standard silicidation techniques are then used to form a refractory metal silicide on the exposed underlying conductive regions, the polycrystalline silicon sidewall elements, and the polycrystalline silicon local interconnect conductors. This results in a complete silicided connection between features connected by the local interconnect conductors.

## Claims

### Claim 1

A conductive local interconnect structure for a semiconductor integrated circuit, comprising:
a substrate;
a first polycrystalline interconnect layer over said substrate and separated therefrom by a thin gate oxide layer;
an insulating layer over said substrate and said first polycrystalline silicon interconnect layer, said insulating layer being relatively thicker than the thin gate oxide layer and having openings therethrough to conductive regions within said substrate and to a second underlying conductive structure, wherein said second underlying conductive structure comprises a portion of said first polycrystalline silicon interconnect layer;
a first patterned polycrystalline silicon layer overlying a portion of said insulating layer, a portion of the second underlying conductive structure, and a portion of a selected conductive region within said substrate; and
first and second connecting polycrystalline silicon regions connected to said first patterned polycrystalline silicon layer and extending to contact the selected conductive substrate region and the second underlying conductive structure, respectively;
at least a portion of said first patterned polycrystalline silicon layer and said first and second connecting polycrystalline silicon regions containing a refractory metal forming a refractory metal silicide, whereby a refractory metal silicide conductor extends from the selected conductive substrate region to said second underlying conductive structure.

### Claim 2 (depends on 1)

The conductive structure of claim 1, wherein the refractory metal comprises titanium.

### Claim 3 (depends on 1)

The conductive structure of claim 1, wherein the refractory metal silicide conductor also covers said first and second conductive structures exposed in the first and second openings.

### Claim 4 (depends on 1)

The conductive structure of claim 1, wherein said first patterned polycrystalline silicon layer does not cross over any other polycrystalline silicon structure.