# US 5,349,212 A · Semiconductor device having thyristor structure

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- Number: US 5,349,212 A
- Document ID: US5349212A
- Status: Granted
- Kind: A
- Application number: 08/069,003
- Filed: 1993-05-28
- Granted: 1994-09-20
- Earliest claimed: 1992-06-01
- Assignees: Fuji Electric Co., Ltd.
- Inventors: Yasukazu Seki
- Web page: https://patentgrep.com/patent/US5349212A

## CPC

- H10D 12/411: {Insulated-gate bipolar transistors [IGBT]}
- H03K 17/567: Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
- H10D 18/40: with turn-on by field effect
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A channel in which electron current is supplied from n.sup.+ type source layer to an n.sup.- type base layer is formed in a thyristor portion by using a first gate electrode to have an electrical connection in a thyristor state. Injection of hole current to a p type base layer, which is necessary to maintain the thyristor state is extracted to a source terminal by a control MOSFET portion including a second gate electrode a turn-off time and the state of this device is changed to the transistor state similar to that in the IGBT so that a short switching time turn-off is realized.

## Claims

### Claim 1

A semiconductor device, comprising:
a second conductive type base region;
a first conductive type drain region formed in a surface of said second conductive type base region;
a drain electrode connected to said first conductive type drain region;
a first conductive type first base region formed in said surface of said second conductive type base region and at a position separated from said first conductive type drain region;
a first conductive type second base region formed in said surface of said second conductive type base region and at a position separated from said first conductive type drain region and said first base region;
a first MIS portion capable of connecting a second conductive type first source region formed in said first base region to said second conductive type base region; and
a second MIS portion including a second conductive type second source region formed in said second base region and a second conductive type drain region formed in said second base region;
wherein said first source region and said second source region are electrically connected, and said first base region and said second conductive type drain region are electrically connected.

### Claim 2

A semiconductor device, comprising:
a second conductive type base region;
a first conductive type drain region formed in a surface of said second conductive type base region;
a drain electrode connected to said first conductive type drain region;
a first conductive type first base region formed in said surface of said second conductive type base region and at a position separated from said first conductive type drain region;
a first conductive type second base region formed in said surface of said second conductive type base region and at a position separated from said first conductive type drain region and said first base region;
a first MIS portion capable of connecting a second conductive type first source region formed in said first base region to said second conductive type base region; and
a second MIS portion including a second conductive type second source region formed in said second base region and a second conductive type drain region formed in said second base region;
wherein said first source region and said second source region are electrically connected, and said first base region and said second conductive type drain region are electrically connected; and
wherein said drain electrode is electrically connected to a side of said second conductive type base region as well as said first conductive type drain region.

### Claim 3 (depends on 2)

A semiconductor device as claimed in claim 2, wherein said first conductive type drain region is formed in a second conductive type buffer region formed in said surface of said second conductive type base region, and said drain electrode is electrically connected to said second conductive type base region through said buffer region.

### Claim 4

A semiconductor device, comprising:
a second conductive type base region;
a first conductive type drain region to which a drain electric potential is applied;
a thyristor portion including, at a position over said second conductive type base region and facing said first conductive type drain region, a first conductive type base region, a source region formed in said first conductive type base region and to which a source electric potential is applied, and a first gate electrode disposed over said source region, said first conductive type base region and said second conductive type base region; and
a control MISFET including a second gate electrode capable of controlling a connection of said first conductive type base region with said source region.

### Claim 5

A semiconductor device, comprising:
a second conductive type base region;
a first conductive type drain region to which a drain electric potential is applied;
a thyristor portion including, at a position over said second conductive type base region and facing said first conductive type drain region, a first conductive type base region, a source region formed in a said first conductive type base region and to which a source electric potential, and a first gate electrode disposed over said source region, said first conductive type base region and said second conductive type base region; and
a control MISFET portion including a first conductive type MIS base region formed on said second conductive type base region separately from said first conductive type base region, and a control MISFET provided with a second gate electrode formed above said first conductive type MIS base region;
wherein said control MISFET includes a second conductive type MIS source layer to which said source electric potential is applied, said source electric potential also applied to said MIS base region, and a second conductive type MIS drain layer connected to said first conductive type base region.

### Claim 6 (depends on 4, 5)

A semiconductor device as claimed in claim 4 or 5, further comprising:
an electric current detecting portion including at least one set of a first conductive type detection base layer in said second conductive type base region, a second conductive type detection source layer formed in said detection base layer and a detection gate electrode disposed over said detection source layer and said second conductive type base region; and
a resistance means connected in series to said detection source layer and through which said source electric potential is applied to said detection source layer, said detection source layer being connected to said second gate electrode.

### Claim 7 (depends on 6)

A semiconductor device as claimed in claim 6, wherein said resistance means is a polycrystalline silicon resistance formed above said second conductive type base region.

### Claim 8

A semiconductor device, comprising:
a first conductive type base region;
a second conductive type drain region to which a drain electric potential is applied through a drain electrode;
a thyristor portion including a second conductive type base region formed at a position separated from said second conductive type drain region, a source region formed in said second conductive type base region and to which a source electric potential is applied and a first gate electrode disposed over said source region, said second conductive type base region and said first conductive type base region;
a first control switching portion capable of controlling a connection between said source region and said second conductive type base region; and
a second control switching portion capable of controlling a connection between said first conductive type base region and said drain electrode; a second conductive type drain region, a thyristor portion, a first control switching portion and a second control switching portion being formed at a surface side of said first conductive type base region.

### Claim 9 (depends on 8)

A semiconductor device as claimed in claim 8, wherein said first control switching portion includes a first control MIS portion on a second conductive type MIS base region formed in said first conductive type base region so as to be separated from said second conductive type base region, said first control MIS portion including a first conductive type MIS source region to which said source electric potential is applied, said source electric potential also being applied to said second conductive type MIS base region; a first conductive type MIS drain region connected to said second conductive type base region; and a second gate electrode formed over surfaces of said first conductive type MIS source region and said first conductive type MIS drain region and supplied with a control signal.

### Claim 10 (depends on 8, 9)

A semiconductor device as claimed in claim 8 or 9, wherein said second control switching portion includes a second control MIS portion including a source at a side of said first conductive type base region; a first conductive type drain region formed in said second conductive type drain region and electrically connected to said drain electrode; and a third gate electrode formed over surfaces of said source region and said first conductive type drain region and supplied with a control signal.