# US 5,349,207 A · Silicon carbide wafer bonded to a silicon wafer

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- Number: US 5,349,207 A
- Document ID: US5349207A
- Status: Granted
- Kind: A
- Application number: 08/020,820
- Filed: 1993-02-22
- Granted: 1994-09-20
- Earliest claimed: 1993-02-22
- Assignees: Texas Instruments Incorporated
- Inventors: Satwinder Malhi
- Web page: https://patentgrep.com/patent/US5349207A

## CPC

- H10D 62/8325: {Silicon carbide}
- H10D 30/6741: {Group IV materials, e.g. germanium or silicon carbide (TFTs having oxide semiconductors H10D30/6755)}
- H10D 62/364: {of IGFETs}
- H10P 90/1902: {Preparing horizontally inhomogeneous wafers}
- H10P 90/1914: {using bonding}
- H10W 10/011: {of isolation regions comprising dielectric materials}
- H10W 10/10: Isolation regions comprising dielectric materials
- Y10S 148/148: Silicon carbide
- Y10S 438/931: Silicon carbide semiconductor
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A silicon carbide structure (10) and method capable of using existing silicon wafer fabrication facilities. A silicon wafer (20) is provided which has a first diameter. At least one silicon carbide wafer (30) is provided which has a given width and length (or diameter). The width and length (or diameter) of the silicon carbide wafer (30) are smaller than the diameter of the silicon wafer (20). The silicon wafer (20) and the silicon carbide wafer (30) are then bonded together. The bonding layer (58) may comprise silicon germanium, silicon dioxide, silicate glass or other materials. Structures such as MOSFET (62) may be then formed in silicon carbide wafer (30).

## Claims

### Claim 1

A silicon carbide structure capable of using existing silicon wafer fabrication facilities comprising:
a. a silicon wafer having a first diameter;
b. at least one silicon carbide wafer having a predetermined maximum width and a predetermined maximum length, wherein said predetermined maximum width and predetermined maximum length are smaller than said first diameter; and
c. a bonding layer located between said silicon wafer and said at least one silicon carbide wafer.

### Claim 2 (depends on 1)

The structure of claim 1 wherein said first diameter is in the range from four to eight inches.

### Claim 3 (depends on 1)

The structure of claim 1 wherein said first diameter is approximately six inches.

### Claim 4 (depends on 1)

The structure of claim 1 wherein said at least one silicon carbide wafer is circular and has a second diameter in the range of one to two inches.

### Claim 5 (depends on 1)

The structure of claim 1 wherein said at least one silicon carbide wafer comprises a plurality of silicon carbide wafers arranged in a mosaic pattern.

### Claim 6 (depends on 1)

The structure of claim 1 wherein said at least one silicon carbide wafer comprises a plurality of silicon carbide wafers having a second diameter, said second diameter smaller than said first diameter.

### Claim 7 (depends on 1)

The structure of claim 1 wherein said bonding layer comprises silicon dioxide.

### Claim 8 (depends on 1)

The structure of claim 1 wherein said bonding layer comprises silicon germanium.

### Claim 9 (depends on 1)

The structure of claim 1 wherein said bonding layer comprises silicate glass.

### Claim 10 (depends on 1)

The structure of claim 1 wherein said bonding layer has a melting point greater than 950.degree. C.

### Claim 11 (depends on 1)

The structure of claim 1 further comprising a transistor located in said at least one silicon carbide wafer.

### Claim 12 (depends on 11)

The structure of claim 11 wherein said transistor comprises a MOSFET.

### Claim 13

A silicon carbide structure capable of using existing silicon wafer fabrication facilities comprising:
a silicon wafer having a first diameter;
at least one silicon carbide wafer having a predetermined maximum width and a predetermined maximum length, wherein said predetermined maximum width and predetermined maximum length are smaller than said first diameter; and
a silicon germanium bonding layer located between said silicon wafer and said at least one silicon carbide wafer.

### Claim 14 (depends on 13)

The structure of claim 13 wherein said at least one silicon carbide wafer comprises a plurality of silicon carbide wafers having a second diameter, said second diameter smaller than said first diameter.

### Claim 15 (depends on 13)

The structure of claim 13 further comprising a transistor located in said at least one silicon carbide wafer.

### Claim 16 (depends on 15)

The structure of claim 15 wherein said transistor comprises a MOSFET.

### Claim 17

A silicon carbide structure capable of using existing silicon wafer fabrication facilities comprising:
a silicon wafer having a first diameter;
at least one silicon carbide wafer having a predetermined maximum width and a predetermined maximum length, wherein said predetermined maximum width and predetermined maximum length are smaller than said first diameter; and
a silicate glass bonding layer located between said silicon wafer and said at least one silicon carbide wafer.

### Claim 18 (depends on 17)

The structure of claim 17 wherein said at least one silicon carbide wafer comprises a plurality of silicon carbide wafers having a second diameter, said second diameter smaller than said first diameter.

### Claim 19 (depends on 17)

The structure of claim 17 further comprising a transistor located in said at least one silicon carbide wafer.

### Claim 20 (depends on 19)

The structure of claim 19 wherein said transistor comprises a MOSFET.