# US 5,346,858 A · Semiconductor non-corrosive metal overcoat

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- Number: US 5,346,858 A
- Document ID: US5346858A
- Status: Granted
- Kind: A
- Application number: 07/914,832
- Filed: 1992-07-16
- Granted: 1994-09-13
- Earliest claimed: 1992-07-16
- Assignees: Texas Instruments Incorporated
- Inventors: James R. Thomas; Larry W. Nye; Richard M. Brook
- Web page: https://patentgrep.com/patent/US5346858A

## CPC

- H10W 72/019: {of bond pads}
- H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
- H10W 72/29: Bond pads specially adapted therefor
- Y10S 148/102: Mask alignment
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

The invention is a method of preventing active metal circuit corrosion on a semiconductor device. Non-corrosive multi-layers of metals are applied over the entire surface of a semiconductor, and then the multi-layers are etched to separate the portions on device contacts from the portions on the non-contact areas of the semiconductor device.

## Claims

### Claim 1

A method for eliminating active metal circuit corrosion through the surface passivation layer and around contacts on a semiconductor device, comprising the steps of:
applying non-corrosive multi-layers of at least two different metals over the entire surface of the semiconductor device, including the passivation layer, and over the contacts on the semiconductor device;
etching the non-corrosive multi-layers to separate the non-corrosive multi-layers on the contacts from the non-corrosive multi-layers on the passivation layer to electrically isolate the contacts and the non-corrosive multi-layers thereon from the non-corrosive multi-layers on the passivation layer; and
leaving the non-corrosive multi-layers on the passivation layer on the completed semiconductor device.

### Claim 2 (depends on 1)

The method according to claim 1, wherein said non-corrosive multi-layers have alignment marks formed therein.

### Claim 3 (depends on 1)

The method according to claim 1, wherein said non-corrosive multi-layers include a device identification template.

### Claim 4

A method for eliminating active metal circuit corrosion through the surface passivation layer, and around contacts on a semiconductor device, comprising the steps of:
applying non-corrosive multi-layers of metals over the entire surface of the semiconductor device, including the passivation layer, and over the contacts on the semiconductor device;
etching the non-corrosive multi-layers to separate the non-corrosive multi-layers on the contacts from the non-corrosive multi-layers on the passivation layer to electrically isolate the contacts and the non-corrosive multi-layers thereon from the non-corrosive multi-layers on the passivation layer;
leaving the non-corrosive multi-layers on the passivation layer on the completed semiconductor device.